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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 02:26:44 +07:00
d6364b8128
The qce crypto driver appends an extra entry to the dst sgl, to maintain
private state information.
When the gcm driver sends requests to the ctr skcipher, it passes the
authentication tag after the actual crypto payload, but it must not be
touched.
Commit 1336c2221bee ("crypto: qce - save a sg table slot for result
buf") limited the destination sgl to avoid overwriting the
authentication tag but it assumed the tag would be in a separate sgl
entry.
This is not always the case, so it is better to limit the length of the
destination buffer to req->cryptlen before appending the result buf.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
130 lines
2.9 KiB
C
130 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
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*/
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#include <linux/dmaengine.h>
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#include <crypto/scatterwalk.h>
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#include "dma.h"
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int qce_dma_request(struct device *dev, struct qce_dma_data *dma)
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{
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int ret;
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dma->txchan = dma_request_chan(dev, "tx");
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if (IS_ERR(dma->txchan))
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return PTR_ERR(dma->txchan);
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dma->rxchan = dma_request_chan(dev, "rx");
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if (IS_ERR(dma->rxchan)) {
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ret = PTR_ERR(dma->rxchan);
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goto error_rx;
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}
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dma->result_buf = kmalloc(QCE_RESULT_BUF_SZ + QCE_IGNORE_BUF_SZ,
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GFP_KERNEL);
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if (!dma->result_buf) {
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ret = -ENOMEM;
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goto error_nomem;
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}
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dma->ignore_buf = dma->result_buf + QCE_RESULT_BUF_SZ;
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return 0;
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error_nomem:
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dma_release_channel(dma->rxchan);
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error_rx:
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dma_release_channel(dma->txchan);
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return ret;
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}
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void qce_dma_release(struct qce_dma_data *dma)
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{
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dma_release_channel(dma->txchan);
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dma_release_channel(dma->rxchan);
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kfree(dma->result_buf);
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}
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struct scatterlist *
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qce_sgtable_add(struct sg_table *sgt, struct scatterlist *new_sgl,
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unsigned int max_len)
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{
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struct scatterlist *sg = sgt->sgl, *sg_last = NULL;
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unsigned int new_len;
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while (sg) {
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if (!sg_page(sg))
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break;
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sg = sg_next(sg);
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}
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if (!sg)
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return ERR_PTR(-EINVAL);
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while (new_sgl && sg && max_len) {
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new_len = new_sgl->length > max_len ? max_len : new_sgl->length;
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sg_set_page(sg, sg_page(new_sgl), new_len, new_sgl->offset);
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sg_last = sg;
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sg = sg_next(sg);
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new_sgl = sg_next(new_sgl);
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max_len -= new_len;
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}
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return sg_last;
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}
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static int qce_dma_prep_sg(struct dma_chan *chan, struct scatterlist *sg,
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int nents, unsigned long flags,
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enum dma_transfer_direction dir,
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dma_async_tx_callback cb, void *cb_param)
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{
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struct dma_async_tx_descriptor *desc;
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dma_cookie_t cookie;
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if (!sg || !nents)
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return -EINVAL;
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desc = dmaengine_prep_slave_sg(chan, sg, nents, dir, flags);
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if (!desc)
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return -EINVAL;
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desc->callback = cb;
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desc->callback_param = cb_param;
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cookie = dmaengine_submit(desc);
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return dma_submit_error(cookie);
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}
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int qce_dma_prep_sgs(struct qce_dma_data *dma, struct scatterlist *rx_sg,
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int rx_nents, struct scatterlist *tx_sg, int tx_nents,
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dma_async_tx_callback cb, void *cb_param)
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{
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struct dma_chan *rxchan = dma->rxchan;
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struct dma_chan *txchan = dma->txchan;
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unsigned long flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;
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int ret;
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ret = qce_dma_prep_sg(rxchan, rx_sg, rx_nents, flags, DMA_MEM_TO_DEV,
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NULL, NULL);
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if (ret)
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return ret;
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return qce_dma_prep_sg(txchan, tx_sg, tx_nents, flags, DMA_DEV_TO_MEM,
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cb, cb_param);
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}
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void qce_dma_issue_pending(struct qce_dma_data *dma)
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{
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dma_async_issue_pending(dma->rxchan);
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dma_async_issue_pending(dma->txchan);
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}
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int qce_dma_terminate_all(struct qce_dma_data *dma)
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{
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int ret;
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ret = dmaengine_terminate_all(dma->rxchan);
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return ret ?: dmaengine_terminate_all(dma->txchan);
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}
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