mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 09:15:11 +07:00
36c02d0be4
When the base driver is enabled but all SoC specific drivers are turned
off, we now get a build error after code was added to always refer to the
clk gates:
drivers/clk/built-in.o: In function `ccu_pll_notifier_cb':
:(.text+0x154f8): undefined reference to `ccu_gate_helper_disable'
:(.text+0x15504): undefined reference to `ccu_gate_helper_enable'
This changes the Kconfig to always require the gate code to be built-in
when CONFIG_SUNXI_CCU is set.
Fixes: 02ae2bc6fe ("clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocks")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
148 lines
2.6 KiB
Plaintext
148 lines
2.6 KiB
Plaintext
config SUNXI_CCU
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bool "Clock support for Allwinner SoCs"
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depends on ARCH_SUNXI || COMPILE_TEST
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select RESET_CONTROLLER
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default ARCH_SUNXI
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if SUNXI_CCU
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# Base clock types
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config SUNXI_CCU_DIV
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_FRAC
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bool
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config SUNXI_CCU_GATE
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def_bool y
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config SUNXI_CCU_MUX
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bool
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config SUNXI_CCU_MULT
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bool
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select SUNXI_CCU_MUX
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config SUNXI_CCU_PHASE
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bool
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# Multi-factor clocks
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config SUNXI_CCU_NK
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKM
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NKMP
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bool
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select SUNXI_CCU_GATE
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config SUNXI_CCU_NM
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bool
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select SUNXI_CCU_FRAC
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select SUNXI_CCU_GATE
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config SUNXI_CCU_MP
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bool
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select SUNXI_CCU_GATE
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select SUNXI_CCU_MUX
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# SoC Drivers
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config SUN50I_A64_CCU
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bool "Support for the Allwinner A64 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default ARM64 && ARCH_SUNXI
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config SUN5I_CCU
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bool "Support for the Allwinner sun5i family CCM"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN5I
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config SUN6I_A31_CCU
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bool "Support for the Allwinner A31/A31s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN6I
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config SUN8I_A23_CCU
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bool "Support for the Allwinner A23 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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config SUN8I_A33_CCU
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bool "Support for the Allwinner A33 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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config SUN8I_H3_CCU
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bool "Support for the Allwinner H3 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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config SUN8I_V3S_CCU
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bool "Support for the Allwinner V3s CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_NK
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select SUNXI_CCU_NKM
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN8I
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config SUN9I_A80_CCU
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bool "Support for the Allwinner A80 CCU"
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select SUNXI_CCU_DIV
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select SUNXI_CCU_MULT
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select SUNXI_CCU_GATE
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select SUNXI_CCU_NKMP
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select SUNXI_CCU_NM
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select SUNXI_CCU_MP
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select SUNXI_CCU_PHASE
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default MACH_SUN9I
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endif
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