mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-25 17:05:24 +07:00
288e4521f0
Currently the GEN_*_RMWcc() macros include a return statement, which pretty much mandates we directly wrap them in a (inline) function. Macros with return statements are tricky and, as per the above, limit use, so remove the return statement and make them statement-expressions. This allows them to be used more widely. Also, shuffle the arguments a bit. Place the @cc argument as 3rd, this makes it consistent between UNARY and BINARY, but more importantly, it makes the @arg0 argument last. Since the @arg0 argument is now last, we can do CPP trickery and make it an optional argument, simplifying the users; 17 out of 18 occurences do not need this argument. Finally, change to asm symbolic names, instead of the numeric ordering of operands, which allows us to get rid of __BINARY_RMWcc_ARG and get cleaner code overall. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: JBeulich@suse.com Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: bp@alien8.de Cc: hpa@linux.intel.com Link: https://lkml.kernel.org/r/20181003130957.108960094@infradead.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
128 lines
3.1 KiB
C
128 lines
3.1 KiB
C
#ifndef __ASM_X86_REFCOUNT_H
|
|
#define __ASM_X86_REFCOUNT_H
|
|
/*
|
|
* x86-specific implementation of refcount_t. Based on PAX_REFCOUNT from
|
|
* PaX/grsecurity.
|
|
*/
|
|
|
|
#ifdef __ASSEMBLY__
|
|
|
|
#include <asm/asm.h>
|
|
#include <asm/bug.h>
|
|
|
|
.macro REFCOUNT_EXCEPTION counter:req
|
|
.pushsection .text..refcount
|
|
111: lea \counter, %_ASM_CX
|
|
112: ud2
|
|
ASM_UNREACHABLE
|
|
.popsection
|
|
113: _ASM_EXTABLE_REFCOUNT(112b, 113b)
|
|
.endm
|
|
|
|
/* Trigger refcount exception if refcount result is negative. */
|
|
.macro REFCOUNT_CHECK_LT_ZERO counter:req
|
|
js 111f
|
|
REFCOUNT_EXCEPTION counter="\counter"
|
|
.endm
|
|
|
|
/* Trigger refcount exception if refcount result is zero or negative. */
|
|
.macro REFCOUNT_CHECK_LE_ZERO counter:req
|
|
jz 111f
|
|
REFCOUNT_CHECK_LT_ZERO counter="\counter"
|
|
.endm
|
|
|
|
/* Trigger refcount exception unconditionally. */
|
|
.macro REFCOUNT_ERROR counter:req
|
|
jmp 111f
|
|
REFCOUNT_EXCEPTION counter="\counter"
|
|
.endm
|
|
|
|
#else /* __ASSEMBLY__ */
|
|
|
|
#include <linux/refcount.h>
|
|
#include <asm/bug.h>
|
|
|
|
/*
|
|
* This is the first portion of the refcount error handling, which lives in
|
|
* .text.unlikely, and is jumped to from the CPU flag check (in the
|
|
* following macros). This saves the refcount value location into CX for
|
|
* the exception handler to use (in mm/extable.c), and then triggers the
|
|
* central refcount exception. The fixup address for the exception points
|
|
* back to the regular execution flow in .text.
|
|
*/
|
|
|
|
static __always_inline void refcount_add(unsigned int i, refcount_t *r)
|
|
{
|
|
asm volatile(LOCK_PREFIX "addl %1,%0\n\t"
|
|
"REFCOUNT_CHECK_LT_ZERO counter=\"%[counter]\""
|
|
: [counter] "+m" (r->refs.counter)
|
|
: "ir" (i)
|
|
: "cc", "cx");
|
|
}
|
|
|
|
static __always_inline void refcount_inc(refcount_t *r)
|
|
{
|
|
asm volatile(LOCK_PREFIX "incl %0\n\t"
|
|
"REFCOUNT_CHECK_LT_ZERO counter=\"%[counter]\""
|
|
: [counter] "+m" (r->refs.counter)
|
|
: : "cc", "cx");
|
|
}
|
|
|
|
static __always_inline void refcount_dec(refcount_t *r)
|
|
{
|
|
asm volatile(LOCK_PREFIX "decl %0\n\t"
|
|
"REFCOUNT_CHECK_LE_ZERO counter=\"%[counter]\""
|
|
: [counter] "+m" (r->refs.counter)
|
|
: : "cc", "cx");
|
|
}
|
|
|
|
static __always_inline __must_check
|
|
bool refcount_sub_and_test(unsigned int i, refcount_t *r)
|
|
{
|
|
|
|
return GEN_BINARY_SUFFIXED_RMWcc(LOCK_PREFIX "subl",
|
|
"REFCOUNT_CHECK_LT_ZERO counter=\"%[var]\"",
|
|
r->refs.counter, e, "er", i, "cx");
|
|
}
|
|
|
|
static __always_inline __must_check bool refcount_dec_and_test(refcount_t *r)
|
|
{
|
|
return GEN_UNARY_SUFFIXED_RMWcc(LOCK_PREFIX "decl",
|
|
"REFCOUNT_CHECK_LT_ZERO counter=\"%[var]\"",
|
|
r->refs.counter, e, "cx");
|
|
}
|
|
|
|
static __always_inline __must_check
|
|
bool refcount_add_not_zero(unsigned int i, refcount_t *r)
|
|
{
|
|
int c, result;
|
|
|
|
c = atomic_read(&(r->refs));
|
|
do {
|
|
if (unlikely(c == 0))
|
|
return false;
|
|
|
|
result = c + i;
|
|
|
|
/* Did we try to increment from/to an undesirable state? */
|
|
if (unlikely(c < 0 || c == INT_MAX || result < c)) {
|
|
asm volatile("REFCOUNT_ERROR counter=\"%[counter]\""
|
|
: : [counter] "m" (r->refs.counter)
|
|
: "cc", "cx");
|
|
break;
|
|
}
|
|
|
|
} while (!atomic_try_cmpxchg(&(r->refs), &c, result));
|
|
|
|
return c != 0;
|
|
}
|
|
|
|
static __always_inline __must_check bool refcount_inc_not_zero(refcount_t *r)
|
|
{
|
|
return refcount_add_not_zero(1, r);
|
|
}
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif
|