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d49a303667
This compatible adds the ability for dw spi controller driver to work with the dw spi controller found on Alpine chips. The dw spi controller has an auto-deselect of Chip-Select, in case there is no data inside the Tx FIFO. While working on platforms with Alpine chips, auto-deselect mode causes an issue for some spi devices that can't handle the Chip-Select deselect in the middle of a transaction. It is a normal behavior for a Tx FIFO to be empty in the middle of a transaction, due to busy cpu. In the Alpine chip family an option to change the default behavior was added to the original dw spi controller to prevent this issue of de-asserting Chip-Select once TX FIFO is empty. The change was to allow SW manual control of the Chip-Select. With this change, as long as the Slave Enable Register is asserted, the Chip-Select will be asserted. As a result, it is necessary to deselect the Slave Select Register once the transaction is done. This feature is enabled via a new device compatible string called 'amazon,alpine-dw-apb-ssi'. Once the driver identifies the new compatible string, it enables the hw fixup logic, by writing to a dedicated register found in the IP reserved area and will start manual deselecting the Slave Select Register when the transfer ends. Signed-off-by: Talel Shenhar <talel@amazon.com> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org>
33 lines
1.0 KiB
Plaintext
33 lines
1.0 KiB
Plaintext
Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface.
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Required properties:
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- compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
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"jaguar2", or "amazon,alpine-dw-apb-ssi"
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- reg : The register base for the controller. For "mscc,<soc>-spi", a second
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register set is required (named ICPU_CFG:SPI_MST)
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- interrupts : One interrupt, used by the controller.
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- #address-cells : <1>, as required by generic SPI binding.
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- #size-cells : <0>, also as required by generic SPI binding.
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Optional properties:
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- cs-gpios : Specifies the gpio pis to be used for chipselects.
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- num-cs : The number of chipselects. If omitted, this will default to 4.
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- reg-io-width : The I/O register width (in bytes) implemented by this
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device. Supported values are 2 or 4 (the default).
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Child nodes as per the generic SPI binding.
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Example:
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spi@fff00000 {
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compatible = "snps,dw-apb-ssi";
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reg = <0xfff00000 0x1000>;
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interrupts = <0 154 4>;
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#address-cells = <1>;
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#size-cells = <0>;
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num-cs = <2>;
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cs-gpios = <&gpio0 13 0>,
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<&gpio0 14 0>;
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};
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