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2ec3b6287b
Add the devicetree bindings documentation for the Analog Devices axi-spi-engine SPI master peripheral. This is a soft-peripheral used in FPGAs. The external interfaces of the peripheral are: * A memory mapped register map which is used to configure the peripheral. * One interrupt. * Two clocks, one for the memory mapped register interface and one for the SPI bus. * A SPI master interface to which the slave devices are connected. These interfaces are described by the devicetree bindings accordingly. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@kernel.org>
32 lines
955 B
Plaintext
32 lines
955 B
Plaintext
Analog Devices AXI SPI Engine controller Device Tree Bindings
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Required properties:
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- compatible : Must be "adi,axi-spi-engine-1.00.a""
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- reg : Physical base address and size of the register map.
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- interrupts : Property with a value describing the interrupt
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number.
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- clock-names : List of input clock names - "s_axi_aclk", "spi_clk"
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- clocks : Clock phandles and specifiers (See clock bindings for
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details on clock-names and clocks).
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- #address-cells : Must be <1>
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- #size-cells : Must be <0>
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Optional subnodes:
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Subnodes are use to represent the SPI slave devices connected to the SPI
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master. They follow the generic SPI bindings as outlined in spi-bus.txt.
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Example:
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spi@@44a00000 {
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compatible = "adi,axi-spi-engine-1.00.a";
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reg = <0x44a00000 0x1000>;
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interrupts = <0 56 4>;
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clocks = <&clkc 15 &clkc 15>;
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clock-names = "s_axi_aclk", "spi_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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/* SPI devices */
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};
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