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The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
26 lines
875 B
Plaintext
26 lines
875 B
Plaintext
UniPhier Media IO DMA controller
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This works as an external DMA engine for SD/eMMC controllers etc.
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found in UniPhier LD4, Pro4, sLD8 SoCs.
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Required properties:
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- compatible: should be "socionext,uniphier-mio-dmac".
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- reg: offset and length of the register set for the device.
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- interrupts: a list of interrupt specifiers associated with the DMA channels.
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- clocks: a single clock specifier.
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- #dma-cells: should be <1>. The single cell represents the channel index.
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Example:
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dmac: dma-controller@5a000000 {
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compatible = "socionext,uniphier-mio-dmac";
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reg = <0x5a000000 0x1000>;
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interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
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<0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
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clocks = <&mio_clk 7>;
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#dma-cells = <1>;
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};
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Note:
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In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo.
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The first two channels share a single interrupt line.
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