Kan Liang 0b505007f9 perf/x86/intel/lbr: Fix the return type of get_lbr_cycles() ... commit f8129cd958b395575e5543ce25a8434874b04d3a upstream. The cycle count of a timed LBR is always 1 in perf record -D. The cycle count is stored in the first 16 bits of the IA32_LBR_x_INFO register, but the get_lbr_cycles() return Boolean type. Use u16 to replace the Boolean type. Fixes: 47125db27e ("perf/x86/intel/lbr: Support Architectural LBR") Reported-by: Stephane Eranian <eranian@google.com> Signed-off-by: Kan Liang <kan.liang@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20201125213720.15692-2-kan.liang@linux.intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2020-12-30 11:54:10 +01:00
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amd	x86/events/amd/iommu: Fix sizeof mismatch	2020-10-03 16:30:56 +02:00
intel	perf/x86/intel/lbr: Fix the return type of get_lbr_cycles()	2020-12-30 11:54:10 +01:00
zhaoxin	x86/perf: Fix a typo	2020-07-22 10:22:08 +02:00
core.c	These are the performance events changes for v5.10:	2020-10-12 14:14:35 -07:00
Kconfig	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
Makefile	perf/x86/rapl: Fix RAPL config variable bug	2020-06-02 11:52:56 +02:00
msr.c	perf/x86/msr: Add Jasper Lake support	2020-09-29 09:57:02 +02:00
perf_event.h	perf/x86/intel: Make anythread filter support conditional	2020-11-09 18:12:36 +01:00
probe.c	perf/x86/rapl: Make perf_probe_msr() more robust and flexible	2020-05-28 07:58:55 +02:00
probe.h	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
rapl.c	perf/x86: fix sysfs type mismatches	2020-11-17 13:15:38 +01:00