mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
872f91b5ea
This adds initial support for clocks controlled by the Resource Power Manager (RPM) processor on some Qualcomm SoCs, which use the qcom_rpm driver to communicate with RPM. Such platforms are apq8064 and msm8960. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
70 lines
2.1 KiB
C
70 lines
2.1 KiB
C
/*
|
|
* Copyright 2015 Linaro Limited
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_CLK_MSM_RPMCC_H
|
|
#define _DT_BINDINGS_CLK_MSM_RPMCC_H
|
|
|
|
/* apq8064 */
|
|
#define RPM_PXO_CLK 0
|
|
#define RPM_PXO_A_CLK 1
|
|
#define RPM_CXO_CLK 2
|
|
#define RPM_CXO_A_CLK 3
|
|
#define RPM_APPS_FABRIC_CLK 4
|
|
#define RPM_APPS_FABRIC_A_CLK 5
|
|
#define RPM_CFPB_CLK 6
|
|
#define RPM_CFPB_A_CLK 7
|
|
#define RPM_QDSS_CLK 8
|
|
#define RPM_QDSS_A_CLK 9
|
|
#define RPM_DAYTONA_FABRIC_CLK 10
|
|
#define RPM_DAYTONA_FABRIC_A_CLK 11
|
|
#define RPM_EBI1_CLK 12
|
|
#define RPM_EBI1_A_CLK 13
|
|
#define RPM_MM_FABRIC_CLK 14
|
|
#define RPM_MM_FABRIC_A_CLK 15
|
|
#define RPM_MMFPB_CLK 16
|
|
#define RPM_MMFPB_A_CLK 17
|
|
#define RPM_SYS_FABRIC_CLK 18
|
|
#define RPM_SYS_FABRIC_A_CLK 19
|
|
#define RPM_SFPB_CLK 20
|
|
#define RPM_SFPB_A_CLK 21
|
|
|
|
/* msm8916 */
|
|
#define RPM_SMD_XO_CLK_SRC 0
|
|
#define RPM_SMD_XO_A_CLK_SRC 1
|
|
#define RPM_SMD_PCNOC_CLK 2
|
|
#define RPM_SMD_PCNOC_A_CLK 3
|
|
#define RPM_SMD_SNOC_CLK 4
|
|
#define RPM_SMD_SNOC_A_CLK 5
|
|
#define RPM_SMD_BIMC_CLK 6
|
|
#define RPM_SMD_BIMC_A_CLK 7
|
|
#define RPM_SMD_QDSS_CLK 8
|
|
#define RPM_SMD_QDSS_A_CLK 9
|
|
#define RPM_SMD_BB_CLK1 10
|
|
#define RPM_SMD_BB_CLK1_A 11
|
|
#define RPM_SMD_BB_CLK2 12
|
|
#define RPM_SMD_BB_CLK2_A 13
|
|
#define RPM_SMD_RF_CLK1 14
|
|
#define RPM_SMD_RF_CLK1_A 15
|
|
#define RPM_SMD_RF_CLK2 16
|
|
#define RPM_SMD_RF_CLK2_A 17
|
|
#define RPM_SMD_BB_CLK1_PIN 18
|
|
#define RPM_SMD_BB_CLK1_A_PIN 19
|
|
#define RPM_SMD_BB_CLK2_PIN 20
|
|
#define RPM_SMD_BB_CLK2_A_PIN 21
|
|
#define RPM_SMD_RF_CLK1_PIN 22
|
|
#define RPM_SMD_RF_CLK1_A_PIN 23
|
|
#define RPM_SMD_RF_CLK2_PIN 24
|
|
#define RPM_SMD_RF_CLK2_A_PIN 25
|
|
|
|
#endif
|