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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5278acc441
For the I2S fractional clocks, there are more bits that need to be set for the clock to run. Their actual meaning is unknown. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200519224151.2074597-3-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
210 lines
4.8 KiB
C
210 lines
4.8 KiB
C
/*
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* mmp factor clock operation source file
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*
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* Copyright (C) 2012 Marvell
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* Chao Xie <xiechao.mail@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include "clk.h"
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/*
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* It is M/N clock
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*
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* Fout from synthesizer can be given from two equations:
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* numerator/denominator = Fin / (Fout * factor)
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*/
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#define to_clk_factor(hw) container_of(hw, struct mmp_clk_factor, hw)
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static long clk_factor_round_rate(struct clk_hw *hw, unsigned long drate,
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unsigned long *prate)
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{
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struct mmp_clk_factor *factor = to_clk_factor(hw);
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u64 rate = 0, prev_rate;
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int i;
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for (i = 0; i < factor->ftbl_cnt; i++) {
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prev_rate = rate;
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rate = *prate;
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rate *= factor->ftbl[i].den;
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do_div(rate, factor->ftbl[i].num * factor->masks->factor);
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if (rate > drate)
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break;
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}
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if ((i == 0) || (i == factor->ftbl_cnt)) {
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return rate;
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} else {
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if ((drate - prev_rate) > (rate - drate))
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return rate;
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else
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return prev_rate;
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}
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}
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static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct mmp_clk_factor *factor = to_clk_factor(hw);
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struct mmp_clk_factor_masks *masks = factor->masks;
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unsigned int val, num, den;
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u64 rate;
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val = readl_relaxed(factor->base);
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/* calculate numerator */
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num = (val >> masks->num_shift) & masks->num_mask;
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/* calculate denominator */
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den = (val >> masks->den_shift) & masks->den_mask;
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if (!den)
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return 0;
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rate = parent_rate;
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rate *= den;
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do_div(rate, num * factor->masks->factor);
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return rate;
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}
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/* Configures new clock rate*/
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static int clk_factor_set_rate(struct clk_hw *hw, unsigned long drate,
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unsigned long prate)
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{
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struct mmp_clk_factor *factor = to_clk_factor(hw);
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struct mmp_clk_factor_masks *masks = factor->masks;
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int i;
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unsigned long val;
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unsigned long flags = 0;
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u64 rate = 0;
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for (i = 0; i < factor->ftbl_cnt; i++) {
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rate = prate;
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rate *= factor->ftbl[i].den;
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do_div(rate, factor->ftbl[i].num * factor->masks->factor);
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if (rate > drate)
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break;
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}
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if (i > 0)
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i--;
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if (factor->lock)
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spin_lock_irqsave(factor->lock, flags);
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val = readl_relaxed(factor->base);
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val &= ~(masks->num_mask << masks->num_shift);
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val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift;
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val &= ~(masks->den_mask << masks->den_shift);
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val |= (factor->ftbl[i].den & masks->den_mask) << masks->den_shift;
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writel_relaxed(val, factor->base);
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if (factor->lock)
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spin_unlock_irqrestore(factor->lock, flags);
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return 0;
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}
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static int clk_factor_init(struct clk_hw *hw)
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{
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struct mmp_clk_factor *factor = to_clk_factor(hw);
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struct mmp_clk_factor_masks *masks = factor->masks;
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u32 val, num, den;
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int i;
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unsigned long flags = 0;
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if (factor->lock)
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spin_lock_irqsave(factor->lock, flags);
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val = readl(factor->base);
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/* calculate numerator */
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num = (val >> masks->num_shift) & masks->num_mask;
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/* calculate denominator */
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den = (val >> masks->den_shift) & masks->den_mask;
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for (i = 0; i < factor->ftbl_cnt; i++)
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if (den == factor->ftbl[i].den && num == factor->ftbl[i].num)
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break;
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if (i >= factor->ftbl_cnt) {
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val &= ~(masks->num_mask << masks->num_shift);
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val |= (factor->ftbl[0].num & masks->num_mask) <<
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masks->num_shift;
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val &= ~(masks->den_mask << masks->den_shift);
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val |= (factor->ftbl[0].den & masks->den_mask) <<
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masks->den_shift;
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}
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if (!(val & masks->enable_mask) || i >= factor->ftbl_cnt) {
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val |= masks->enable_mask;
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writel(val, factor->base);
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}
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if (factor->lock)
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spin_unlock_irqrestore(factor->lock, flags);
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return 0;
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}
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static const struct clk_ops clk_factor_ops = {
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.recalc_rate = clk_factor_recalc_rate,
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.round_rate = clk_factor_round_rate,
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.set_rate = clk_factor_set_rate,
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.init = clk_factor_init,
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};
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struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
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unsigned long flags, void __iomem *base,
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struct mmp_clk_factor_masks *masks,
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struct mmp_clk_factor_tbl *ftbl,
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unsigned int ftbl_cnt, spinlock_t *lock)
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{
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struct mmp_clk_factor *factor;
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struct clk_init_data init;
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struct clk *clk;
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if (!masks) {
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pr_err("%s: must pass a clk_factor_mask\n", __func__);
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return ERR_PTR(-EINVAL);
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}
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factor = kzalloc(sizeof(*factor), GFP_KERNEL);
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if (!factor)
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return ERR_PTR(-ENOMEM);
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/* struct clk_aux assignments */
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factor->base = base;
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factor->masks = masks;
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factor->ftbl = ftbl;
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factor->ftbl_cnt = ftbl_cnt;
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factor->hw.init = &init;
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factor->lock = lock;
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init.name = name;
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init.ops = &clk_factor_ops;
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init.flags = flags;
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init.parent_names = &parent_name;
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init.num_parents = 1;
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clk = clk_register(NULL, &factor->hw);
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if (IS_ERR_OR_NULL(clk))
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kfree(factor);
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return clk;
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}
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