mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 02:45:34 +07:00
a9ee34b70e
DRM_MSM_FBDEV config is used to enable/disable fbdev emulation for the msm kms driver. Replace this with the top level DRM_FBDEV_EMULATION config option where applicable. This also prevents build breaks caused by undefined drm_fb_helper_* functions when legacy fbdev support was disabled. Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
|
|
config DRM_MSM
|
|
tristate "MSM DRM"
|
|
depends on DRM
|
|
depends on ARCH_QCOM || (ARM && COMPILE_TEST)
|
|
depends on OF && COMMON_CLK
|
|
select REGULATOR
|
|
select DRM_KMS_HELPER
|
|
select DRM_PANEL
|
|
select SHMEM
|
|
select TMPFS
|
|
select QCOM_SCM
|
|
default y
|
|
help
|
|
DRM/KMS driver for MSM/snapdragon.
|
|
|
|
config DRM_MSM_REGISTER_LOGGING
|
|
bool "MSM DRM register logging"
|
|
depends on DRM_MSM
|
|
default n
|
|
help
|
|
Compile in support for logging register reads/writes in a format
|
|
that can be parsed by envytools demsm tool. If enabled, register
|
|
logging can be switched on via msm.reglog=y module param.
|
|
|
|
config DRM_MSM_DSI
|
|
bool "Enable DSI support in MSM DRM driver"
|
|
depends on DRM_MSM
|
|
select DRM_PANEL
|
|
select DRM_MIPI_DSI
|
|
default y
|
|
help
|
|
Choose this option if you have a need for MIPI DSI connector
|
|
support.
|
|
|
|
config DRM_MSM_DSI_PLL
|
|
bool "Enable DSI PLL driver in MSM DRM"
|
|
depends on DRM_MSM_DSI && COMMON_CLK
|
|
default y
|
|
help
|
|
Choose this option to enable DSI PLL driver which provides DSI
|
|
source clocks under common clock framework.
|
|
|
|
config DRM_MSM_DSI_28NM_PHY
|
|
bool "Enable DSI 28nm PHY driver in MSM DRM"
|
|
depends on DRM_MSM_DSI
|
|
default y
|
|
help
|
|
Choose this option if the 28nm DSI PHY is used on the platform.
|
|
|
|
config DRM_MSM_DSI_20NM_PHY
|
|
bool "Enable DSI 20nm PHY driver in MSM DRM"
|
|
depends on DRM_MSM_DSI
|
|
default y
|
|
help
|
|
Choose this option if the 20nm DSI PHY is used on the platform.
|