mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-01-23 06:42:03 +07:00
67f3b58f3b
This patch adds a function, which will internally get the gem buffer for DSB engine. The GEM buffer is from global GTT, and is mapped into CPU domain, contains the data + opcode to be feed to DSB engine. v1: Initial version. v2: - removed some unwanted code. (Chris) - Used i915_gem_object_create_internal instead of _shmem. (Chris) - cmd_buf_tail removed and can be derived through vma object. (Chris) v3: vma realeased if i915_gem_object_pin_map() failed. (Shashank) v4: for simplification and based on current usage added single dsb object in intel_crtc. (Shashank) v5: seting NULL to cmd_buf moved outside of mutex in dsb-put(). (Shashank) v6: - refcount machanism added. - Used atomic_add_return and atomic_dec_and_test instead of atomic_inc and atomic_dec. (Jani) Cc: Imre Deak <imre.deak@intel.com> Cc: Michel Thierry <michel.thierry@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> [Jani: added #include <linux/types.h> while pushing] Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190920115930.27829-3-animesh.manna@intel.com
81 lines
1.8 KiB
C
81 lines
1.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2019 Intel Corporation
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*
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*/
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#include "i915_drv.h"
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#include "intel_display_types.h"
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#define DSB_BUF_SIZE (2 * PAGE_SIZE)
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struct intel_dsb *
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intel_dsb_get(struct intel_crtc *crtc)
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{
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struct drm_device *dev = crtc->base.dev;
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struct drm_i915_private *i915 = to_i915(dev);
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struct intel_dsb *dsb = &crtc->dsb;
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struct drm_i915_gem_object *obj;
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struct i915_vma *vma;
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intel_wakeref_t wakeref;
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if (!HAS_DSB(i915))
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return dsb;
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if (atomic_add_return(1, &dsb->refcount) != 1)
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return dsb;
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dsb->id = DSB1;
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wakeref = intel_runtime_pm_get(&i915->runtime_pm);
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obj = i915_gem_object_create_internal(i915, DSB_BUF_SIZE);
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if (IS_ERR(obj)) {
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DRM_ERROR("Gem object creation failed\n");
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goto err;
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}
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mutex_lock(&i915->drm.struct_mutex);
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vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
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mutex_unlock(&i915->drm.struct_mutex);
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if (IS_ERR(vma)) {
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DRM_ERROR("Vma creation failed\n");
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i915_gem_object_put(obj);
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atomic_dec(&dsb->refcount);
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goto err;
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}
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dsb->cmd_buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
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if (IS_ERR(dsb->cmd_buf)) {
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DRM_ERROR("Command buffer creation failed\n");
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i915_vma_unpin_and_release(&vma, 0);
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dsb->cmd_buf = NULL;
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atomic_dec(&dsb->refcount);
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goto err;
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}
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dsb->vma = vma;
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err:
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intel_runtime_pm_put(&i915->runtime_pm, wakeref);
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return dsb;
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}
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void intel_dsb_put(struct intel_dsb *dsb)
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{
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struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
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struct drm_i915_private *i915 = to_i915(crtc->base.dev);
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if (!HAS_DSB(i915))
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return;
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if (WARN_ON(atomic_read(&dsb->refcount) == 0))
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return;
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if (atomic_dec_and_test(&dsb->refcount)) {
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mutex_lock(&i915->drm.struct_mutex);
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i915_gem_object_unpin_map(dsb->vma->obj);
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i915_vma_unpin_and_release(&dsb->vma, 0);
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mutex_unlock(&i915->drm.struct_mutex);
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dsb->cmd_buf = NULL;
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}
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}
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