mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 22:40:55 +07:00
1d8aca9df6
Ux500 is regressing due to commit
a21763a0b1
"pinctrl: nomadik: activate strict mux mode" which disallows
Nomadik GPIO 5 to be muxed in as a level shifter voltage select
pin, as it is currently described as being used for RX on UART1.
The behaviour is correct, instead the hardware config has been
incorrecly specified: UART1 is indeed unused on HREFv60plus and
Snowball and that is why HREFv60plus can use the pins it would
normally occupy as the voltage select line for the MMC/SD
levelshifter (Snowball uses it for I2C4).
The reason UART1 was anyway enabled on these platforms was
probably to secure the port enumeration to userspace. This
can be solved by using aliases (done in a separate patch) so
we can now deactivate UART1 and let MMC/SD use it properly
on HREFv60plus. We explicitly activate it only for the
older HREFprev60 board.
To complete, we set up the pin configuration for these pins
properly in the sdi0 node.
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
284 lines
6.0 KiB
Plaintext
284 lines
6.0 KiB
Plaintext
/*
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* Copyright 2012 ST-Ericsson AB
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "ste-dbx5x0.dtsi"
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#include "ste-href-family-pinctrl.dtsi"
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/ {
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memory {
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reg = <0x00000000 0x20000000>;
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};
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soc {
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usb_per5@a03e0000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&musb_default_mode>;
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pinctrl-1 = <&musb_sleep_mode>;
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};
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uart@80120000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&uart0_default_mode>;
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pinctrl-1 = <&uart0_sleep_mode>;
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status = "okay";
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};
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/* This UART is unused and thus left disabled */
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uart@80121000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&uart1_default_mode>;
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pinctrl-1 = <&uart1_sleep_mode>;
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};
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uart@80007000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&uart2_default_mode>;
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pinctrl-1 = <&uart2_sleep_mode>;
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status = "okay";
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};
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i2c@80004000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c0_default_mode>;
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pinctrl-1 = <&i2c0_sleep_mode>;
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};
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i2c@80122000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c1_default_mode>;
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pinctrl-1 = <&i2c1_sleep_mode>;
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};
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i2c@80128000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c2_default_mode>;
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pinctrl-1 = <&i2c2_sleep_mode>;
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lp5521@33 {
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compatible = "national,lp5521";
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reg = <0x33>;
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label = "lp5521_pri";
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clock-mode = /bits/ 8 <2>;
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chan0 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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linux,default-trigger = "heartbeat";
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};
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chan1 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan2 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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};
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lp5521@34 {
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compatible = "national,lp5521";
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reg = <0x34>;
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label = "lp5521_sec";
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clock-mode = /bits/ 8 <2>;
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chan0 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan1 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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chan2 {
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led-cur = /bits/ 8 <0x2f>;
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max-cur = /bits/ 8 <0x5f>;
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};
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};
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bh1780@29 {
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compatible = "rohm,bh1780gli";
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reg = <0x29>;
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};
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};
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i2c@80110000 {
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pinctrl-names = "default","sleep";
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pinctrl-0 = <&i2c3_default_mode>;
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pinctrl-1 = <&i2c3_sleep_mode>;
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};
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vmmci: regulator-gpio {
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compatible = "regulator-gpio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2900000>;
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regulator-name = "mmci-reg";
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regulator-type = "voltage";
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startup-delay-us = <100>;
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enable-active-high;
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states = <1800000 0x1
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2900000 0x0>;
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};
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// External Micro SD slot
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sdi0_per1@80126000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-mmc-highspeed;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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full-pwr-cycle;
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st,sig-dir-dat0;
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st,sig-dir-dat2;
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st,sig-dir-cmd;
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st,sig-pin-fbclk;
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vmmc-supply = <&ab8500_ldo_aux3_reg>;
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vqmmc-supply = <&vmmci>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdi0_default_mode>;
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pinctrl-1 = <&sdi0_sleep_mode>;
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status = "okay";
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};
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// WLAN SDIO channel
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sdi1_per2@80118000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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non-removable;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdi1_default_mode>;
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pinctrl-1 = <&sdi1_sleep_mode>;
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status = "okay";
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};
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// PoP:ed eMMC
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sdi2_per3@80005000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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vmmc-supply = <&db8500_vsmps2_reg>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdi2_default_mode>;
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pinctrl-1 = <&sdi2_sleep_mode>;
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status = "okay";
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};
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// On-board eMMC
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sdi4_per2@80114000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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cap-mmc-highspeed;
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non-removable;
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vmmc-supply = <&ab8500_ldo_aux2_reg>;
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&sdi4_default_mode>;
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pinctrl-1 = <&sdi4_sleep_mode>;
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status = "okay";
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};
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sound {
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compatible = "stericsson,snd-soc-mop500";
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stericsson,cpu-dai = <&msp1 &msp3>;
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stericsson,audio-codec = <&codec>;
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};
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msp0: msp@80123000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp0_default_mode>;
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status = "okay";
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};
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msp1: msp@80124000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp1_default_mode>;
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status = "okay";
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};
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msp2: msp@80117000 {
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pinctrl-names = "default";
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pinctrl-0 = <&msp2_default_mode>;
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};
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msp3: msp@80125000 {
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status = "okay";
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};
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prcmu@80157000 {
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ab8500 {
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ab8500-gpio {
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compatible = "stericsson,ab8500-gpio";
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};
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ab8500-regulators {
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ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
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regulator-name = "V-DISPLAY";
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};
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ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
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regulator-name = "V-eMMC1";
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};
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ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
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regulator-name = "V-MMC-SD";
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};
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ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
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regulator-name = "V-INTCORE";
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};
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ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
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regulator-name = "V-TVOUT";
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};
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ab8500_ldo_usb_reg: ab8500_ldo_usb {
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regulator-name = "dummy";
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};
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ab8500_ldo_audio_reg: ab8500_ldo_audio {
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regulator-name = "V-AUD";
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};
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ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
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regulator-name = "V-AMIC1";
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};
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ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
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regulator-name = "V-AMIC2";
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};
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ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
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regulator-name = "V-DMIC";
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};
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ab8500_ldo_ana_reg: ab8500_ldo_ana {
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regulator-name = "V-CSI/DSI";
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};
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};
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};
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};
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mcde@a0350000 {
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&lcd_default_mode>;
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pinctrl-1 = <&lcd_sleep_mode>;
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};
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};
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};
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