mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
c456cfc2e5
Based on 1 normalized pattern(s): released under the terms of the gnu gpl v2 0 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171439.076212120@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
105 lines
2.5 KiB
C
105 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
|
|
/*
|
|
* arch/sh/mm/cache-sh3.c
|
|
*
|
|
* Copyright (C) 1999, 2000 Niibe Yutaka
|
|
* Copyright (C) 2002 Paul Mundt
|
|
*/
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/mman.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/threads.h>
|
|
#include <asm/addrspace.h>
|
|
#include <asm/page.h>
|
|
#include <asm/pgtable.h>
|
|
#include <asm/processor.h>
|
|
#include <asm/cache.h>
|
|
#include <asm/io.h>
|
|
#include <linux/uaccess.h>
|
|
#include <asm/pgalloc.h>
|
|
#include <asm/mmu_context.h>
|
|
#include <asm/cacheflush.h>
|
|
|
|
/*
|
|
* Write back the dirty D-caches, but not invalidate them.
|
|
*
|
|
* Is this really worth it, or should we just alias this routine
|
|
* to __flush_purge_region too?
|
|
*
|
|
* START: Virtual Address (U0, P1, or P3)
|
|
* SIZE: Size of the region.
|
|
*/
|
|
|
|
static void sh3__flush_wback_region(void *start, int size)
|
|
{
|
|
unsigned long v, j;
|
|
unsigned long begin, end;
|
|
unsigned long flags;
|
|
|
|
begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
|
|
end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
|
|
& ~(L1_CACHE_BYTES-1);
|
|
|
|
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
|
|
unsigned long addrstart = CACHE_OC_ADDRESS_ARRAY;
|
|
for (j = 0; j < current_cpu_data.dcache.ways; j++) {
|
|
unsigned long data, addr, p;
|
|
|
|
p = __pa(v);
|
|
addr = addrstart | (v & current_cpu_data.dcache.entry_mask);
|
|
local_irq_save(flags);
|
|
data = __raw_readl(addr);
|
|
|
|
if ((data & CACHE_PHYSADDR_MASK) ==
|
|
(p & CACHE_PHYSADDR_MASK)) {
|
|
data &= ~SH_CACHE_UPDATED;
|
|
__raw_writel(data, addr);
|
|
local_irq_restore(flags);
|
|
break;
|
|
}
|
|
local_irq_restore(flags);
|
|
addrstart += current_cpu_data.dcache.way_incr;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Write back the dirty D-caches and invalidate them.
|
|
*
|
|
* START: Virtual Address (U0, P1, or P3)
|
|
* SIZE: Size of the region.
|
|
*/
|
|
static void sh3__flush_purge_region(void *start, int size)
|
|
{
|
|
unsigned long v;
|
|
unsigned long begin, end;
|
|
|
|
begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
|
|
end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
|
|
& ~(L1_CACHE_BYTES-1);
|
|
|
|
for (v = begin; v < end; v+=L1_CACHE_BYTES) {
|
|
unsigned long data, addr;
|
|
|
|
data = (v & 0xfffffc00); /* _Virtual_ address, ~U, ~V */
|
|
addr = CACHE_OC_ADDRESS_ARRAY |
|
|
(v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC;
|
|
__raw_writel(data, addr);
|
|
}
|
|
}
|
|
|
|
void __init sh3_cache_init(void)
|
|
{
|
|
__flush_wback_region = sh3__flush_wback_region;
|
|
__flush_purge_region = sh3__flush_purge_region;
|
|
|
|
/*
|
|
* No write back please
|
|
*
|
|
* Except I don't think there's any way to avoid the writeback.
|
|
* So we just alias it to sh3__flush_purge_region(). dwmw2.
|
|
*/
|
|
__flush_invalidate_region = sh3__flush_purge_region;
|
|
}
|