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cd647575ac
The A31 and later have an R_INTC block which handles the NMI interrupt pin on the SoC. This interrupt pin is used by the external PMIC to signal interrupts to the SoC. While this hardware block is undocumented, the interrupt offsets combined with the register regions for the existing "sun6i-a31-sc-nmi" compatible line up with the old interrupt controller found on the A10. Experiments show that only the first 32 interrupt lines can be enabled, and only the first (NMI) interrupt is actually connected. This patch adds a new, properly named compatible for the A31 R_INTC block, which requires the register region to be properly aligned to the block boundary. For comparison, the old "sun6i-a31-sc-nmi" compatible had its register region aligned with the first used register. This didn't match up with the memory map in the SoC's datasheet/user manual. Since the new compatible supercedes the old one, deprecate the old one. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
31 lines
1.0 KiB
Plaintext
31 lines
1.0 KiB
Plaintext
Allwinner Sunxi NMI Controller
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==============================
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Required properties:
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- compatible : should be one of the following:
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- "allwinner,sun7i-a20-sc-nmi"
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- "allwinner,sun6i-a31-sc-nmi" (deprecated)
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- "allwinner,sun6i-a31-r-intc"
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- "allwinner,sun9i-a80-nmi"
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- reg : Specifies base physical address and size of the registers.
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- interrupt-controller : Identifies the node as an interrupt controller
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- #interrupt-cells : Specifies the number of cells needed to encode an
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interrupt source. The value shall be 2. The first cell is the IRQ number, the
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second cell the trigger type as defined in interrupt.txt in this directory.
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- interrupt-parent: Specifies the parent interrupt controller.
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- interrupts: Specifies the interrupt line (NMI) which is handled by
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the interrupt controller in the parent controller's notation. This value
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shall be the NMI.
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Example:
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sc-nmi-intc@01c00030 {
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compatible = "allwinner,sun7i-a20-sc-nmi";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x01c00030 0x0c>;
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interrupt-parent = <&gic>;
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interrupts = <0 0 4>;
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};
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