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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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0371d3f7e8
Ensure that the meminfo array is sanity checked before we pass the memory to memblock. This helps to ensure that memblock and meminfo agree on the dimensions of memory, especially when more memory is passed than the kernel can deal with. Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1069 lines
25 KiB
C
1069 lines
25 KiB
C
/*
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* linux/arch/arm/kernel/setup.c
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*
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* Copyright (C) 1995-2001 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/stddef.h>
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#include <linux/ioport.h>
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#include <linux/delay.h>
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#include <linux/utsname.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/bootmem.h>
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#include <linux/seq_file.h>
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#include <linux/screen_info.h>
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#include <linux/init.h>
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#include <linux/kexec.h>
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#include <linux/of_fdt.h>
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#include <linux/crash_dump.h>
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#include <linux/root_dev.h>
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#include <linux/cpu.h>
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#include <linux/interrupt.h>
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#include <linux/smp.h>
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/memblock.h>
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#include <asm/unified.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/elf.h>
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#include <asm/procinfo.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/smp_plat.h>
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#include <asm/mach-types.h>
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include <asm/tlbflush.h>
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#include <asm/prom.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/time.h>
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#include <asm/traps.h>
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#include <asm/unwind.h>
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#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
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#include "compat.h"
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#endif
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#include "atags.h"
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#include "tcm.h"
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#ifndef MEM_SIZE
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#define MEM_SIZE (16*1024*1024)
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#endif
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#if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
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char fpe_type[8];
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static int __init fpe_setup(char *line)
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{
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memcpy(fpe_type, line, 8);
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return 1;
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}
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__setup("fpe=", fpe_setup);
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#endif
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extern void paging_init(struct machine_desc *desc);
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extern void sanity_check_meminfo(void);
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extern void reboot_setup(char *str);
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unsigned int processor_id;
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EXPORT_SYMBOL(processor_id);
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unsigned int __machine_arch_type __read_mostly;
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EXPORT_SYMBOL(__machine_arch_type);
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unsigned int cacheid __read_mostly;
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EXPORT_SYMBOL(cacheid);
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unsigned int __atags_pointer __initdata;
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unsigned int system_rev;
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EXPORT_SYMBOL(system_rev);
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unsigned int system_serial_low;
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EXPORT_SYMBOL(system_serial_low);
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unsigned int system_serial_high;
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EXPORT_SYMBOL(system_serial_high);
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unsigned int elf_hwcap __read_mostly;
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EXPORT_SYMBOL(elf_hwcap);
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#ifdef MULTI_CPU
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struct processor processor __read_mostly;
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#endif
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#ifdef MULTI_TLB
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struct cpu_tlb_fns cpu_tlb __read_mostly;
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#endif
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#ifdef MULTI_USER
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struct cpu_user_fns cpu_user __read_mostly;
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#endif
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#ifdef MULTI_CACHE
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struct cpu_cache_fns cpu_cache __read_mostly;
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#endif
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#ifdef CONFIG_OUTER_CACHE
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struct outer_cache_fns outer_cache __read_mostly;
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EXPORT_SYMBOL(outer_cache);
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#endif
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struct stack {
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u32 irq[3];
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u32 abt[3];
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u32 und[3];
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} ____cacheline_aligned;
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static struct stack stacks[NR_CPUS];
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char elf_platform[ELF_PLATFORM_SIZE];
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EXPORT_SYMBOL(elf_platform);
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static const char *cpu_name;
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static const char *machine_name;
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static char __initdata cmd_line[COMMAND_LINE_SIZE];
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struct machine_desc *machine_desc __initdata;
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static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
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static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
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#define ENDIANNESS ((char)endian_test.l)
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DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
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/*
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* Standard memory resources
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*/
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static struct resource mem_res[] = {
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{
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.name = "Video RAM",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM
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},
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{
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.name = "Kernel text",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM
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},
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{
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.name = "Kernel data",
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_MEM
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}
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};
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#define video_ram mem_res[0]
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#define kernel_code mem_res[1]
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#define kernel_data mem_res[2]
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static struct resource io_res[] = {
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{
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.name = "reserved",
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.start = 0x3bc,
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.end = 0x3be,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "reserved",
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.start = 0x378,
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.end = 0x37f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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},
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{
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.name = "reserved",
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.start = 0x278,
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.end = 0x27f,
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.flags = IORESOURCE_IO | IORESOURCE_BUSY
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}
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};
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#define lp0 io_res[0]
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#define lp1 io_res[1]
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#define lp2 io_res[2]
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static const char *proc_arch[] = {
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"undefined/unknown",
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"3",
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"4",
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"4T",
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"5",
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"5T",
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"5TE",
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"5TEJ",
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"6TEJ",
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"7",
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"?(11)",
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"?(12)",
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"?(13)",
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"?(14)",
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"?(15)",
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"?(16)",
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"?(17)",
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};
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int cpu_architecture(void)
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{
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int cpu_arch;
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if ((read_cpuid_id() & 0x0008f000) == 0) {
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cpu_arch = CPU_ARCH_UNKNOWN;
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} else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
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cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
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} else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
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cpu_arch = (read_cpuid_id() >> 16) & 7;
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if (cpu_arch)
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cpu_arch += CPU_ARCH_ARMv3;
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} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
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unsigned int mmfr0;
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/* Revised CPUID format. Read the Memory Model Feature
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* Register 0 and check for VMSAv7 or PMSAv7 */
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asm("mrc p15, 0, %0, c0, c1, 4"
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: "=r" (mmfr0));
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if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
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(mmfr0 & 0x000000f0) >= 0x00000030)
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cpu_arch = CPU_ARCH_ARMv7;
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else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
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(mmfr0 & 0x000000f0) == 0x00000020)
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cpu_arch = CPU_ARCH_ARMv6;
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else
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cpu_arch = CPU_ARCH_UNKNOWN;
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} else
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cpu_arch = CPU_ARCH_UNKNOWN;
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return cpu_arch;
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}
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static int cpu_has_aliasing_icache(unsigned int arch)
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{
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int aliasing_icache;
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unsigned int id_reg, num_sets, line_size;
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/* arch specifies the register format */
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switch (arch) {
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case CPU_ARCH_ARMv7:
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asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
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: /* No output operands */
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: "r" (1));
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isb();
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asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
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: "=r" (id_reg));
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line_size = 4 << ((id_reg & 0x7) + 2);
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num_sets = ((id_reg >> 13) & 0x7fff) + 1;
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aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
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break;
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case CPU_ARCH_ARMv6:
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aliasing_icache = read_cpuid_cachetype() & (1 << 11);
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break;
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default:
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/* I-cache aliases will be handled by D-cache aliasing code */
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aliasing_icache = 0;
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}
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return aliasing_icache;
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}
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static void __init cacheid_init(void)
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{
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unsigned int cachetype = read_cpuid_cachetype();
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unsigned int arch = cpu_architecture();
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if (arch >= CPU_ARCH_ARMv6) {
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if ((cachetype & (7 << 29)) == 4 << 29) {
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/* ARMv7 register format */
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cacheid = CACHEID_VIPT_NONALIASING;
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if ((cachetype & (3 << 14)) == 1 << 14)
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cacheid |= CACHEID_ASID_TAGGED;
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else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
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cacheid |= CACHEID_VIPT_I_ALIASING;
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} else if (cachetype & (1 << 23)) {
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cacheid = CACHEID_VIPT_ALIASING;
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} else {
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cacheid = CACHEID_VIPT_NONALIASING;
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if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6))
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cacheid |= CACHEID_VIPT_I_ALIASING;
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}
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} else {
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cacheid = CACHEID_VIVT;
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}
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printk("CPU: %s data cache, %s instruction cache\n",
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cache_is_vivt() ? "VIVT" :
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cache_is_vipt_aliasing() ? "VIPT aliasing" :
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cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
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cache_is_vivt() ? "VIVT" :
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icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
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icache_is_vipt_aliasing() ? "VIPT aliasing" :
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cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
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}
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/*
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* These functions re-use the assembly code in head.S, which
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* already provide the required functionality.
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*/
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extern struct proc_info_list *lookup_processor_type(unsigned int);
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void __init early_print(const char *str, ...)
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{
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extern void printascii(const char *);
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char buf[256];
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va_list ap;
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va_start(ap, str);
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vsnprintf(buf, sizeof(buf), str, ap);
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va_end(ap);
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#ifdef CONFIG_DEBUG_LL
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printascii(buf);
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#endif
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printk("%s", buf);
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}
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static void __init feat_v6_fixup(void)
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{
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int id = read_cpuid_id();
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if ((id & 0xff0f0000) != 0x41070000)
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return;
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/*
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* HWCAP_TLS is available only on 1136 r1p0 and later,
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* see also kuser_get_tls_init.
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*/
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if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
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elf_hwcap &= ~HWCAP_TLS;
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}
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static void __init setup_processor(void)
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{
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struct proc_info_list *list;
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/*
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* locate processor in the list of supported processor
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* types. The linker builds this table for us from the
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* entries in arch/arm/mm/proc-*.S
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*/
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list = lookup_processor_type(read_cpuid_id());
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if (!list) {
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printk("CPU configuration botched (ID %08x), unable "
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"to continue.\n", read_cpuid_id());
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while (1);
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}
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cpu_name = list->cpu_name;
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#ifdef MULTI_CPU
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processor = *list->proc;
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#endif
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#ifdef MULTI_TLB
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cpu_tlb = *list->tlb;
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#endif
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#ifdef MULTI_USER
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cpu_user = *list->user;
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#endif
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#ifdef MULTI_CACHE
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cpu_cache = *list->cache;
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#endif
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printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
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cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
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proc_arch[cpu_architecture()], cr_alignment);
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sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
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sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
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elf_hwcap = list->elf_hwcap;
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#ifndef CONFIG_ARM_THUMB
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elf_hwcap &= ~HWCAP_THUMB;
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#endif
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feat_v6_fixup();
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cacheid_init();
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cpu_proc_init();
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}
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/*
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* cpu_init - initialise one CPU.
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*
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* cpu_init sets up the per-CPU stacks.
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*/
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void cpu_init(void)
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{
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unsigned int cpu = smp_processor_id();
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struct stack *stk = &stacks[cpu];
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if (cpu >= NR_CPUS) {
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printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
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BUG();
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}
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/*
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* Define the placement constraint for the inline asm directive below.
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* In Thumb-2, msr with an immediate value is not allowed.
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*/
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#ifdef CONFIG_THUMB2_KERNEL
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#define PLC "r"
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#else
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#define PLC "I"
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#endif
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/*
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* setup stacks for re-entrant exception handlers
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*/
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__asm__ (
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"msr cpsr_c, %1\n\t"
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"add r14, %0, %2\n\t"
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"mov sp, r14\n\t"
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"msr cpsr_c, %3\n\t"
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"add r14, %0, %4\n\t"
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"mov sp, r14\n\t"
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"msr cpsr_c, %5\n\t"
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"add r14, %0, %6\n\t"
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"mov sp, r14\n\t"
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"msr cpsr_c, %7"
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:
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: "r" (stk),
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PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
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"I" (offsetof(struct stack, irq[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
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"I" (offsetof(struct stack, abt[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
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"I" (offsetof(struct stack, und[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
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: "r14");
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}
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void __init dump_machine_table(void)
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{
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struct machine_desc *p;
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early_print("Available machine support:\n\nID (hex)\tNAME\n");
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for_each_machine_desc(p)
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early_print("%08x\t%s\n", p->nr, p->name);
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early_print("\nPlease check your kernel config and/or bootloader.\n");
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while (true)
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/* can't use cpu_relax() here as it may require MMU setup */;
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}
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int __init arm_add_memory(phys_addr_t start, unsigned long size)
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{
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struct membank *bank = &meminfo.bank[meminfo.nr_banks];
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if (meminfo.nr_banks >= NR_BANKS) {
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printk(KERN_CRIT "NR_BANKS too low, "
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"ignoring memory at 0x%08llx\n", (long long)start);
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return -EINVAL;
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}
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/*
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* Ensure that start/size are aligned to a page boundary.
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* Size is appropriately rounded down, start is rounded up.
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*/
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size -= start & ~PAGE_MASK;
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bank->start = PAGE_ALIGN(start);
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bank->size = size & PAGE_MASK;
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/*
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* Check whether this memory region has non-zero size or
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* invalid node number.
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*/
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if (bank->size == 0)
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return -EINVAL;
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meminfo.nr_banks++;
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return 0;
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}
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|
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/*
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* Pick out the memory size. We look for mem=size@start,
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* where start and size are "size[KkMm]"
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*/
|
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static int __init early_mem(char *p)
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{
|
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static int usermem __initdata = 0;
|
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unsigned long size;
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phys_addr_t start;
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char *endp;
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|
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/*
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* If the user specifies memory size, we
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* blow away any automatically generated
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* size.
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*/
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if (usermem == 0) {
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usermem = 1;
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meminfo.nr_banks = 0;
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}
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start = PHYS_OFFSET;
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size = memparse(p, &endp);
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if (*endp == '@')
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start = memparse(endp + 1, NULL);
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arm_add_memory(start, size);
|
|
|
|
return 0;
|
|
}
|
|
early_param("mem", early_mem);
|
|
|
|
static void __init
|
|
setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
|
|
{
|
|
#ifdef CONFIG_BLK_DEV_RAM
|
|
extern int rd_size, rd_image_start, rd_prompt, rd_doload;
|
|
|
|
rd_image_start = image_start;
|
|
rd_prompt = prompt;
|
|
rd_doload = doload;
|
|
|
|
if (rd_sz)
|
|
rd_size = rd_sz;
|
|
#endif
|
|
}
|
|
|
|
static void __init request_standard_resources(struct machine_desc *mdesc)
|
|
{
|
|
struct memblock_region *region;
|
|
struct resource *res;
|
|
|
|
kernel_code.start = virt_to_phys(_text);
|
|
kernel_code.end = virt_to_phys(_etext - 1);
|
|
kernel_data.start = virt_to_phys(_sdata);
|
|
kernel_data.end = virt_to_phys(_end - 1);
|
|
|
|
for_each_memblock(memory, region) {
|
|
res = alloc_bootmem_low(sizeof(*res));
|
|
res->name = "System RAM";
|
|
res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
|
|
res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
|
|
res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
|
|
|
|
request_resource(&iomem_resource, res);
|
|
|
|
if (kernel_code.start >= res->start &&
|
|
kernel_code.end <= res->end)
|
|
request_resource(res, &kernel_code);
|
|
if (kernel_data.start >= res->start &&
|
|
kernel_data.end <= res->end)
|
|
request_resource(res, &kernel_data);
|
|
}
|
|
|
|
if (mdesc->video_start) {
|
|
video_ram.start = mdesc->video_start;
|
|
video_ram.end = mdesc->video_end;
|
|
request_resource(&iomem_resource, &video_ram);
|
|
}
|
|
|
|
/*
|
|
* Some machines don't have the possibility of ever
|
|
* possessing lp0, lp1 or lp2
|
|
*/
|
|
if (mdesc->reserve_lp0)
|
|
request_resource(&ioport_resource, &lp0);
|
|
if (mdesc->reserve_lp1)
|
|
request_resource(&ioport_resource, &lp1);
|
|
if (mdesc->reserve_lp2)
|
|
request_resource(&ioport_resource, &lp2);
|
|
}
|
|
|
|
/*
|
|
* Tag parsing.
|
|
*
|
|
* This is the new way of passing data to the kernel at boot time. Rather
|
|
* than passing a fixed inflexible structure to the kernel, we pass a list
|
|
* of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
|
|
* tag for the list to be recognised (to distinguish the tagged list from
|
|
* a param_struct). The list is terminated with a zero-length tag (this tag
|
|
* is not parsed in any way).
|
|
*/
|
|
static int __init parse_tag_core(const struct tag *tag)
|
|
{
|
|
if (tag->hdr.size > 2) {
|
|
if ((tag->u.core.flags & 1) == 0)
|
|
root_mountflags &= ~MS_RDONLY;
|
|
ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_CORE, parse_tag_core);
|
|
|
|
static int __init parse_tag_mem32(const struct tag *tag)
|
|
{
|
|
return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
|
|
}
|
|
|
|
__tagtable(ATAG_MEM, parse_tag_mem32);
|
|
|
|
#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
|
|
struct screen_info screen_info = {
|
|
.orig_video_lines = 30,
|
|
.orig_video_cols = 80,
|
|
.orig_video_mode = 0,
|
|
.orig_video_ega_bx = 0,
|
|
.orig_video_isVGA = 1,
|
|
.orig_video_points = 8
|
|
};
|
|
|
|
static int __init parse_tag_videotext(const struct tag *tag)
|
|
{
|
|
screen_info.orig_x = tag->u.videotext.x;
|
|
screen_info.orig_y = tag->u.videotext.y;
|
|
screen_info.orig_video_page = tag->u.videotext.video_page;
|
|
screen_info.orig_video_mode = tag->u.videotext.video_mode;
|
|
screen_info.orig_video_cols = tag->u.videotext.video_cols;
|
|
screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
|
|
screen_info.orig_video_lines = tag->u.videotext.video_lines;
|
|
screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
|
|
screen_info.orig_video_points = tag->u.videotext.video_points;
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
|
|
#endif
|
|
|
|
static int __init parse_tag_ramdisk(const struct tag *tag)
|
|
{
|
|
setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
|
|
(tag->u.ramdisk.flags & 2) == 0,
|
|
tag->u.ramdisk.start, tag->u.ramdisk.size);
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
|
|
|
|
static int __init parse_tag_serialnr(const struct tag *tag)
|
|
{
|
|
system_serial_low = tag->u.serialnr.low;
|
|
system_serial_high = tag->u.serialnr.high;
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_SERIAL, parse_tag_serialnr);
|
|
|
|
static int __init parse_tag_revision(const struct tag *tag)
|
|
{
|
|
system_rev = tag->u.revision.rev;
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_REVISION, parse_tag_revision);
|
|
|
|
static int __init parse_tag_cmdline(const struct tag *tag)
|
|
{
|
|
#if defined(CONFIG_CMDLINE_EXTEND)
|
|
strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
|
|
strlcat(default_command_line, tag->u.cmdline.cmdline,
|
|
COMMAND_LINE_SIZE);
|
|
#elif defined(CONFIG_CMDLINE_FORCE)
|
|
pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
|
|
#else
|
|
strlcpy(default_command_line, tag->u.cmdline.cmdline,
|
|
COMMAND_LINE_SIZE);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
|
|
|
|
/*
|
|
* Scan the tag table for this tag, and call its parse function.
|
|
* The tag table is built by the linker from all the __tagtable
|
|
* declarations.
|
|
*/
|
|
static int __init parse_tag(const struct tag *tag)
|
|
{
|
|
extern struct tagtable __tagtable_begin, __tagtable_end;
|
|
struct tagtable *t;
|
|
|
|
for (t = &__tagtable_begin; t < &__tagtable_end; t++)
|
|
if (tag->hdr.tag == t->tag) {
|
|
t->parse(tag);
|
|
break;
|
|
}
|
|
|
|
return t < &__tagtable_end;
|
|
}
|
|
|
|
/*
|
|
* Parse all tags in the list, checking both the global and architecture
|
|
* specific tag tables.
|
|
*/
|
|
static void __init parse_tags(const struct tag *t)
|
|
{
|
|
for (; t->hdr.size; t = tag_next(t))
|
|
if (!parse_tag(t))
|
|
printk(KERN_WARNING
|
|
"Ignoring unrecognised tag 0x%08x\n",
|
|
t->hdr.tag);
|
|
}
|
|
|
|
/*
|
|
* This holds our defaults.
|
|
*/
|
|
static struct init_tags {
|
|
struct tag_header hdr1;
|
|
struct tag_core core;
|
|
struct tag_header hdr2;
|
|
struct tag_mem32 mem;
|
|
struct tag_header hdr3;
|
|
} init_tags __initdata = {
|
|
{ tag_size(tag_core), ATAG_CORE },
|
|
{ 1, PAGE_SIZE, 0xff },
|
|
{ tag_size(tag_mem32), ATAG_MEM },
|
|
{ MEM_SIZE },
|
|
{ 0, ATAG_NONE }
|
|
};
|
|
|
|
static int __init customize_machine(void)
|
|
{
|
|
/* customizes platform devices, or adds new ones */
|
|
if (machine_desc->init_machine)
|
|
machine_desc->init_machine();
|
|
return 0;
|
|
}
|
|
arch_initcall(customize_machine);
|
|
|
|
#ifdef CONFIG_KEXEC
|
|
static inline unsigned long long get_total_mem(void)
|
|
{
|
|
unsigned long total;
|
|
|
|
total = max_low_pfn - min_low_pfn;
|
|
return total << PAGE_SHIFT;
|
|
}
|
|
|
|
/**
|
|
* reserve_crashkernel() - reserves memory are for crash kernel
|
|
*
|
|
* This function reserves memory area given in "crashkernel=" kernel command
|
|
* line parameter. The memory reserved is used by a dump capture kernel when
|
|
* primary kernel is crashing.
|
|
*/
|
|
static void __init reserve_crashkernel(void)
|
|
{
|
|
unsigned long long crash_size, crash_base;
|
|
unsigned long long total_mem;
|
|
int ret;
|
|
|
|
total_mem = get_total_mem();
|
|
ret = parse_crashkernel(boot_command_line, total_mem,
|
|
&crash_size, &crash_base);
|
|
if (ret)
|
|
return;
|
|
|
|
ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
|
|
if (ret < 0) {
|
|
printk(KERN_WARNING "crashkernel reservation failed - "
|
|
"memory is in use (0x%lx)\n", (unsigned long)crash_base);
|
|
return;
|
|
}
|
|
|
|
printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
|
|
"for crashkernel (System RAM: %ldMB)\n",
|
|
(unsigned long)(crash_size >> 20),
|
|
(unsigned long)(crash_base >> 20),
|
|
(unsigned long)(total_mem >> 20));
|
|
|
|
crashk_res.start = crash_base;
|
|
crashk_res.end = crash_base + crash_size - 1;
|
|
insert_resource(&iomem_resource, &crashk_res);
|
|
}
|
|
#else
|
|
static inline void reserve_crashkernel(void) {}
|
|
#endif /* CONFIG_KEXEC */
|
|
|
|
static void __init squash_mem_tags(struct tag *tag)
|
|
{
|
|
for (; tag->hdr.size; tag = tag_next(tag))
|
|
if (tag->hdr.tag == ATAG_MEM)
|
|
tag->hdr.tag = ATAG_NONE;
|
|
}
|
|
|
|
static struct machine_desc * __init setup_machine_tags(unsigned int nr)
|
|
{
|
|
struct tag *tags = (struct tag *)&init_tags;
|
|
struct machine_desc *mdesc = NULL, *p;
|
|
char *from = default_command_line;
|
|
|
|
init_tags.mem.start = PHYS_OFFSET;
|
|
|
|
/*
|
|
* locate machine in the list of supported machines.
|
|
*/
|
|
for_each_machine_desc(p)
|
|
if (nr == p->nr) {
|
|
printk("Machine: %s\n", p->name);
|
|
mdesc = p;
|
|
break;
|
|
}
|
|
|
|
if (!mdesc) {
|
|
early_print("\nError: unrecognized/unsupported machine ID"
|
|
" (r1 = 0x%08x).\n\n", nr);
|
|
dump_machine_table(); /* does not return */
|
|
}
|
|
|
|
if (__atags_pointer)
|
|
tags = phys_to_virt(__atags_pointer);
|
|
else if (mdesc->boot_params) {
|
|
#ifdef CONFIG_MMU
|
|
/*
|
|
* We still are executing with a minimal MMU mapping created
|
|
* with the presumption that the machine default for this
|
|
* is located in the first MB of RAM. Anything else will
|
|
* fault and silently hang the kernel at this point.
|
|
*/
|
|
if (mdesc->boot_params < PHYS_OFFSET ||
|
|
mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
|
|
printk(KERN_WARNING
|
|
"Default boot params at physical 0x%08lx out of reach\n",
|
|
mdesc->boot_params);
|
|
} else
|
|
#endif
|
|
{
|
|
tags = phys_to_virt(mdesc->boot_params);
|
|
}
|
|
}
|
|
|
|
#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
|
|
/*
|
|
* If we have the old style parameters, convert them to
|
|
* a tag list.
|
|
*/
|
|
if (tags->hdr.tag != ATAG_CORE)
|
|
convert_to_tag_list(tags);
|
|
#endif
|
|
|
|
if (tags->hdr.tag != ATAG_CORE) {
|
|
#if defined(CONFIG_OF)
|
|
/*
|
|
* If CONFIG_OF is set, then assume this is a reasonably
|
|
* modern system that should pass boot parameters
|
|
*/
|
|
early_print("Warning: Neither atags nor dtb found\n");
|
|
#endif
|
|
tags = (struct tag *)&init_tags;
|
|
}
|
|
|
|
if (mdesc->fixup)
|
|
mdesc->fixup(mdesc, tags, &from, &meminfo);
|
|
|
|
if (tags->hdr.tag == ATAG_CORE) {
|
|
if (meminfo.nr_banks != 0)
|
|
squash_mem_tags(tags);
|
|
save_atags(tags);
|
|
parse_tags(tags);
|
|
}
|
|
|
|
/* parse_early_param needs a boot_command_line */
|
|
strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
|
|
|
|
return mdesc;
|
|
}
|
|
|
|
|
|
void __init setup_arch(char **cmdline_p)
|
|
{
|
|
struct machine_desc *mdesc;
|
|
|
|
unwind_init();
|
|
|
|
setup_processor();
|
|
mdesc = setup_machine_fdt(__atags_pointer);
|
|
if (!mdesc)
|
|
mdesc = setup_machine_tags(machine_arch_type);
|
|
machine_desc = mdesc;
|
|
machine_name = mdesc->name;
|
|
|
|
if (mdesc->soft_reboot)
|
|
reboot_setup("s");
|
|
|
|
init_mm.start_code = (unsigned long) _text;
|
|
init_mm.end_code = (unsigned long) _etext;
|
|
init_mm.end_data = (unsigned long) _edata;
|
|
init_mm.brk = (unsigned long) _end;
|
|
|
|
/* populate cmd_line too for later use, preserving boot_command_line */
|
|
strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
|
|
*cmdline_p = cmd_line;
|
|
|
|
parse_early_param();
|
|
|
|
sanity_check_meminfo();
|
|
arm_memblock_init(&meminfo, mdesc);
|
|
|
|
paging_init(mdesc);
|
|
request_standard_resources(mdesc);
|
|
|
|
unflatten_device_tree();
|
|
|
|
#ifdef CONFIG_SMP
|
|
if (is_smp())
|
|
smp_init_cpus();
|
|
#endif
|
|
reserve_crashkernel();
|
|
|
|
cpu_init();
|
|
tcm_init();
|
|
|
|
#ifdef CONFIG_MULTI_IRQ_HANDLER
|
|
handle_arch_irq = mdesc->handle_irq;
|
|
#endif
|
|
|
|
#ifdef CONFIG_VT
|
|
#if defined(CONFIG_VGA_CONSOLE)
|
|
conswitchp = &vga_con;
|
|
#elif defined(CONFIG_DUMMY_CONSOLE)
|
|
conswitchp = &dummy_con;
|
|
#endif
|
|
#endif
|
|
early_trap_init();
|
|
|
|
if (mdesc->init_early)
|
|
mdesc->init_early();
|
|
}
|
|
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
|
|
cpuinfo->cpu.hotpluggable = 1;
|
|
register_cpu(&cpuinfo->cpu, cpu);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
subsys_initcall(topology_init);
|
|
|
|
#ifdef CONFIG_HAVE_PROC_CPU
|
|
static int __init proc_cpu_init(void)
|
|
{
|
|
struct proc_dir_entry *res;
|
|
|
|
res = proc_mkdir("cpu", NULL);
|
|
if (!res)
|
|
return -ENOMEM;
|
|
return 0;
|
|
}
|
|
fs_initcall(proc_cpu_init);
|
|
#endif
|
|
|
|
static const char *hwcap_str[] = {
|
|
"swp",
|
|
"half",
|
|
"thumb",
|
|
"26bit",
|
|
"fastmult",
|
|
"fpa",
|
|
"vfp",
|
|
"edsp",
|
|
"java",
|
|
"iwmmxt",
|
|
"crunch",
|
|
"thumbee",
|
|
"neon",
|
|
"vfpv3",
|
|
"vfpv3d16",
|
|
NULL
|
|
};
|
|
|
|
static int c_show(struct seq_file *m, void *v)
|
|
{
|
|
int i;
|
|
|
|
seq_printf(m, "Processor\t: %s rev %d (%s)\n",
|
|
cpu_name, read_cpuid_id() & 15, elf_platform);
|
|
|
|
#if defined(CONFIG_SMP)
|
|
for_each_online_cpu(i) {
|
|
/*
|
|
* glibc reads /proc/cpuinfo to determine the number of
|
|
* online processors, looking for lines beginning with
|
|
* "processor". Give glibc what it expects.
|
|
*/
|
|
seq_printf(m, "processor\t: %d\n", i);
|
|
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
|
|
per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
|
|
(per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
|
|
}
|
|
#else /* CONFIG_SMP */
|
|
seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
|
|
loops_per_jiffy / (500000/HZ),
|
|
(loops_per_jiffy / (5000/HZ)) % 100);
|
|
#endif
|
|
|
|
/* dump out the processor features */
|
|
seq_puts(m, "Features\t: ");
|
|
|
|
for (i = 0; hwcap_str[i]; i++)
|
|
if (elf_hwcap & (1 << i))
|
|
seq_printf(m, "%s ", hwcap_str[i]);
|
|
|
|
seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
|
|
seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
|
|
|
|
if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
|
|
/* pre-ARM7 */
|
|
seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
|
|
} else {
|
|
if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
|
|
/* ARM7 */
|
|
seq_printf(m, "CPU variant\t: 0x%02x\n",
|
|
(read_cpuid_id() >> 16) & 127);
|
|
} else {
|
|
/* post-ARM7 */
|
|
seq_printf(m, "CPU variant\t: 0x%x\n",
|
|
(read_cpuid_id() >> 20) & 15);
|
|
}
|
|
seq_printf(m, "CPU part\t: 0x%03x\n",
|
|
(read_cpuid_id() >> 4) & 0xfff);
|
|
}
|
|
seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
|
|
|
|
seq_puts(m, "\n");
|
|
|
|
seq_printf(m, "Hardware\t: %s\n", machine_name);
|
|
seq_printf(m, "Revision\t: %04x\n", system_rev);
|
|
seq_printf(m, "Serial\t\t: %08x%08x\n",
|
|
system_serial_high, system_serial_low);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void *c_start(struct seq_file *m, loff_t *pos)
|
|
{
|
|
return *pos < 1 ? (void *)1 : NULL;
|
|
}
|
|
|
|
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
|
{
|
|
++*pos;
|
|
return NULL;
|
|
}
|
|
|
|
static void c_stop(struct seq_file *m, void *v)
|
|
{
|
|
}
|
|
|
|
const struct seq_operations cpuinfo_op = {
|
|
.start = c_start,
|
|
.next = c_next,
|
|
.stop = c_stop,
|
|
.show = c_show
|
|
};
|