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66c405e72b
This patch adds a default PCIe bus clock node. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [horms+renesas@verge.net.au: resolved conflict] Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
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