mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 04:56:43 +07:00
49148020bc
Merge header files for m68k and m68knommu to the single location:
arch/m68k/include/asm
The majority of this patch was the result of the
script that is included in the changelog below.
The script was originally written by Arnd Bergman and
exten by me to cover a few more files.
When the header files differed the script uses the following:
The original m68k file is named <file>_mm.h [mm for memory manager]
The m68knommu file is named <file>_no.h [no for no memory manager]
The files uses the following include guard:
This include gaurd works as the m68knommu toolchain set
the __uClinux__ symbol - so this should work in userspace too.
Merging the header files for m68k and m68knommu exposes the
(unexpected?) ABI differences thus it is easier to actually
identify these and thus to fix them.
The commit has been build tested with both a m68k and
a m68knommu toolchain - with success.
The commit has also been tested with "make headers_check"
and this patch fixes make headers_check for m68knommu.
The script used:
TARGET=arch/m68k/include/asm
SOURCE=arch/m68knommu/include/asm
INCLUDE="cachectl.h errno.h fcntl.h hwtest.h ioctls.h ipcbuf.h \
linkage.h math-emu.h md.h mman.h movs.h msgbuf.h openprom.h \
oplib.h poll.h posix_types.h resource.h rtc.h sembuf.h shmbuf.h \
shm.h shmparam.h socket.h sockios.h spinlock.h statfs.h stat.h \
termbits.h termios.h tlb.h types.h user.h"
EQUAL="auxvec.h cputime.h device.h emergency-restart.h futex.h \
ioctl.h irq_regs.h kdebug.h local.h mutex.h percpu.h \
sections.h topology.h"
NOMUUFILES="anchor.h bootstd.h coldfire.h commproc.h dbg.h \
elia.h flat.h m5206sim.h m520xsim.h m523xsim.h m5249sim.h \
m5272sim.h m527xsim.h m528xsim.h m5307sim.h m532xsim.h \
m5407sim.h m68360_enet.h m68360.h m68360_pram.h m68360_quicc.h \
m68360_regs.h MC68328.h MC68332.h MC68EZ328.h MC68VZ328.h \
mcfcache.h mcfdma.h mcfmbus.h mcfne.h mcfpci.h mcfpit.h \
mcfsim.h mcfsmc.h mcftimer.h mcfuart.h mcfwdebug.h \
nettel.h quicc_simple.h smp.h"
FILES="atomic.h bitops.h bootinfo.h bug.h bugs.h byteorder.h cache.h \
cacheflush.h checksum.h current.h delay.h div64.h \
dma-mapping.h dma.h elf.h entry.h fb.h fpu.h hardirq.h hw_irq.h io.h \
irq.h kmap_types.h machdep.h mc146818rtc.h mmu.h mmu_context.h \
module.h page.h page_offset.h param.h pci.h pgalloc.h \
pgtable.h processor.h ptrace.h scatterlist.h segment.h \
setup.h sigcontext.h siginfo.h signal.h string.h system.h swab.h \
thread_info.h timex.h tlbflush.h traps.h uaccess.h ucontext.h \
unaligned.h unistd.h"
mergefile() {
BASE=${1%.h}
git mv ${SOURCE}/$1 ${TARGET}/${BASE}_no.h
git mv ${TARGET}/$1 ${TARGET}/${BASE}_mm.h
cat << EOF > ${TARGET}/$1
EOF
git add ${TARGET}/$1
}
set -e
mkdir -p ${TARGET}
git mv include/asm-m68k/* ${TARGET}
rmdir include/asm-m68k
git rm ${SOURCE}/Kbuild
for F in $INCLUDE $EQUAL; do
git rm ${SOURCE}/$F
done
for F in $NOMUUFILES; do
git mv ${SOURCE}/$F ${TARGET}/$F
done
for F in $FILES ; do
mergefile $F
done
rmdir arch/m68knommu/include/asm
rmdir arch/m68knommu/include
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
153 lines
4.3 KiB
C
153 lines
4.3 KiB
C
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/* include/asm-m68knommu/MC68332.h: '332 control registers
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*
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* Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
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*
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*/
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#ifndef _MC68332_H_
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#define _MC68332_H_
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#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
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#define WORD_REF(addr) (*((volatile unsigned short*)addr))
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#define PORTE_ADDR 0xfffa11
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#define PORTE BYTE_REF(PORTE_ADDR)
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#define DDRE_ADDR 0xfffa15
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#define DDRE BYTE_REF(DDRE_ADDR)
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#define PEPAR_ADDR 0xfffa17
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#define PEPAR BYTE_REF(PEPAR_ADDR)
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#define PORTF_ADDR 0xfffa19
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#define PORTF BYTE_REF(PORTF_ADDR)
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#define DDRF_ADDR 0xfffa1d
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#define DDRF BYTE_REF(DDRF_ADDR)
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#define PFPAR_ADDR 0xfffa1f
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#define PFPAR BYTE_REF(PFPAR_ADDR)
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#define PORTQS_ADDR 0xfffc15
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#define PORTQS BYTE_REF(PORTQS_ADDR)
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#define DDRQS_ADDR 0xfffc17
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#define DDRQS BYTE_REF(DDRQS_ADDR)
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#define PQSPAR_ADDR 0xfffc16
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#define PQSPAR BYTE_REF(PQSPAR_ADDR)
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#define CSPAR0_ADDR 0xFFFA44
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#define CSPAR0 WORD_REF(CSPAR0_ADDR)
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#define CSPAR1_ADDR 0xFFFA46
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#define CSPAR1 WORD_REF(CSPAR1_ADDR)
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#define CSARBT_ADDR 0xFFFA48
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#define CSARBT WORD_REF(CSARBT_ADDR)
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#define CSOPBT_ADDR 0xFFFA4A
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#define CSOPBT WORD_REF(CSOPBT_ADDR)
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#define CSBAR0_ADDR 0xFFFA4C
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#define CSBAR0 WORD_REF(CSBAR0_ADDR)
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#define CSOR0_ADDR 0xFFFA4E
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#define CSOR0 WORD_REF(CSOR0_ADDR)
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#define CSBAR1_ADDR 0xFFFA50
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#define CSBAR1 WORD_REF(CSBAR1_ADDR)
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#define CSOR1_ADDR 0xFFFA52
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#define CSOR1 WORD_REF(CSOR1_ADDR)
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#define CSBAR2_ADDR 0xFFFA54
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#define CSBAR2 WORD_REF(CSBAR2_ADDR)
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#define CSOR2_ADDR 0xFFFA56
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#define CSOR2 WORD_REF(CSOR2_ADDR)
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#define CSBAR3_ADDR 0xFFFA58
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#define CSBAR3 WORD_REF(CSBAR3_ADDR)
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#define CSOR3_ADDR 0xFFFA5A
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#define CSOR3 WORD_REF(CSOR3_ADDR)
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#define CSBAR4_ADDR 0xFFFA5C
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#define CSBAR4 WORD_REF(CSBAR4_ADDR)
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#define CSOR4_ADDR 0xFFFA5E
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#define CSOR4 WORD_REF(CSOR4_ADDR)
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#define CSBAR5_ADDR 0xFFFA60
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#define CSBAR5 WORD_REF(CSBAR5_ADDR)
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#define CSOR5_ADDR 0xFFFA62
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#define CSOR5 WORD_REF(CSOR5_ADDR)
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#define CSBAR6_ADDR 0xFFFA64
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#define CSBAR6 WORD_REF(CSBAR6_ADDR)
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#define CSOR6_ADDR 0xFFFA66
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#define CSOR6 WORD_REF(CSOR6_ADDR)
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#define CSBAR7_ADDR 0xFFFA68
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#define CSBAR7 WORD_REF(CSBAR7_ADDR)
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#define CSOR7_ADDR 0xFFFA6A
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#define CSOR7 WORD_REF(CSOR7_ADDR)
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#define CSBAR8_ADDR 0xFFFA6C
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#define CSBAR8 WORD_REF(CSBAR8_ADDR)
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#define CSOR8_ADDR 0xFFFA6E
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#define CSOR8 WORD_REF(CSOR8_ADDR)
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#define CSBAR9_ADDR 0xFFFA70
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#define CSBAR9 WORD_REF(CSBAR9_ADDR)
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#define CSOR9_ADDR 0xFFFA72
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#define CSOR9 WORD_REF(CSOR9_ADDR)
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#define CSBAR10_ADDR 0xFFFA74
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#define CSBAR10 WORD_REF(CSBAR10_ADDR)
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#define CSOR10_ADDR 0xFFFA76
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#define CSOR10 WORD_REF(CSOR10_ADDR)
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#define CSOR_MODE_ASYNC 0x0000
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#define CSOR_MODE_SYNC 0x8000
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#define CSOR_MODE_MASK 0x8000
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#define CSOR_BYTE_DISABLE 0x0000
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#define CSOR_BYTE_UPPER 0x4000
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#define CSOR_BYTE_LOWER 0x2000
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#define CSOR_BYTE_BOTH 0x6000
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#define CSOR_BYTE_MASK 0x6000
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#define CSOR_RW_RSVD 0x0000
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#define CSOR_RW_READ 0x0800
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#define CSOR_RW_WRITE 0x1000
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#define CSOR_RW_BOTH 0x1800
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#define CSOR_RW_MASK 0x1800
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#define CSOR_STROBE_DS 0x0400
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#define CSOR_STROBE_AS 0x0000
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#define CSOR_STROBE_MASK 0x0400
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#define CSOR_DSACK_WAIT(x) (wait << 6)
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#define CSOR_DSACK_FTERM (14 << 6)
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#define CSOR_DSACK_EXTERNAL (15 << 6)
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#define CSOR_DSACK_MASK 0x03c0
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#define CSOR_SPACE_CPU 0x0000
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#define CSOR_SPACE_USER 0x0010
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#define CSOR_SPACE_SU 0x0020
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#define CSOR_SPACE_BOTH 0x0030
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#define CSOR_SPACE_MASK 0x0030
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#define CSOR_IPL_ALL 0x0000
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#define CSOR_IPL_PRIORITY(x) (x << 1)
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#define CSOR_IPL_MASK 0x000e
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#define CSOR_AVEC_ON 0x0001
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#define CSOR_AVEC_OFF 0x0000
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#define CSOR_AVEC_MASK 0x0001
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#define CSBAR_ADDR(x) ((addr >> 11) << 3)
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#define CSBAR_ADDR_MASK 0xfff8
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#define CSBAR_BLKSIZE_2K 0x0000
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#define CSBAR_BLKSIZE_8K 0x0001
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#define CSBAR_BLKSIZE_16K 0x0002
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#define CSBAR_BLKSIZE_64K 0x0003
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#define CSBAR_BLKSIZE_128K 0x0004
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#define CSBAR_BLKSIZE_256K 0x0005
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#define CSBAR_BLKSIZE_512K 0x0006
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#define CSBAR_BLKSIZE_1M 0x0007
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#define CSBAR_BLKSIZE_MASK 0x0007
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#define CSPAR_DISC 0
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#define CSPAR_ALT 1
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#define CSPAR_CS8 2
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#define CSPAR_CS16 3
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#define CSPAR_MASK 3
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#define CSPAR0_CSBOOT(x) (x << 0)
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#define CSPAR0_CS0(x) (x << 2)
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#define CSPAR0_CS1(x) (x << 4)
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#define CSPAR0_CS2(x) (x << 6)
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#define CSPAR0_CS3(x) (x << 8)
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#define CSPAR0_CS4(x) (x << 10)
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#define CSPAR0_CS5(x) (x << 12)
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#define CSPAR1_CS6(x) (x << 0)
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#define CSPAR1_CS7(x) (x << 2)
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#define CSPAR1_CS8(x) (x << 4)
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#define CSPAR1_CS9(x) (x << 6)
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#define CSPAR1_CS10(x) (x << 8)
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#endif
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