mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 08:26:49 +07:00
876bb331e2
Currently, we unconditionally enable PCI polling and we don't look at the edac_op_state module parameter. Make this dependent on the parameter setting supplied on the command line. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
501 lines
11 KiB
C
501 lines
11 KiB
C
/*
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* EDAC PCI component
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*
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* Author: Dave Jiang <djiang@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/sysctl.h>
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#include <linux/highmem.h>
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#include <linux/timer.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/list.h>
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#include <linux/ctype.h>
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#include <linux/workqueue.h>
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#include <asm/uaccess.h>
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#include <asm/page.h>
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#include "edac_core.h"
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#include "edac_module.h"
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static DEFINE_MUTEX(edac_pci_ctls_mutex);
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static LIST_HEAD(edac_pci_list);
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static atomic_t pci_indexes = ATOMIC_INIT(0);
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/*
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* edac_pci_alloc_ctl_info
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*
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* The alloc() function for the 'edac_pci' control info
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* structure. The chip driver will allocate one of these for each
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* edac_pci it is going to control/register with the EDAC CORE.
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*/
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struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
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const char *edac_pci_name)
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{
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struct edac_pci_ctl_info *pci;
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void *p = NULL, *pvt;
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unsigned int size;
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edac_dbg(1, "\n");
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pci = edac_align_ptr(&p, sizeof(*pci), 1);
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pvt = edac_align_ptr(&p, 1, sz_pvt);
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size = ((unsigned long)pvt) + sz_pvt;
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/* Alloc the needed control struct memory */
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pci = kzalloc(size, GFP_KERNEL);
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if (pci == NULL)
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return NULL;
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/* Now much private space */
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pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
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pci->pvt_info = pvt;
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pci->op_state = OP_ALLOC;
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snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
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return pci;
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}
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EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
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/*
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* edac_pci_free_ctl_info()
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*
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* Last action on the pci control structure.
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*
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* call the remove sysfs information, which will unregister
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* this control struct's kobj. When that kobj's ref count
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* goes to zero, its release function will be call and then
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* kfree() the memory.
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*/
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void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
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{
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edac_dbg(1, "\n");
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edac_pci_remove_sysfs(pci);
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}
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EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
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/*
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* find_edac_pci_by_dev()
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* scans the edac_pci list for a specific 'struct device *'
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*
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* return NULL if not found, or return control struct pointer
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*/
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static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
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{
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struct edac_pci_ctl_info *pci;
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struct list_head *item;
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edac_dbg(1, "\n");
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list_for_each(item, &edac_pci_list) {
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pci = list_entry(item, struct edac_pci_ctl_info, link);
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if (pci->dev == dev)
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return pci;
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}
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return NULL;
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}
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/*
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* add_edac_pci_to_global_list
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* Before calling this function, caller must assign a unique value to
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* edac_dev->pci_idx.
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* Return:
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* 0 on success
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* 1 on failure
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*/
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static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
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{
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struct list_head *item, *insert_before;
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struct edac_pci_ctl_info *rover;
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edac_dbg(1, "\n");
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insert_before = &edac_pci_list;
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/* Determine if already on the list */
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rover = find_edac_pci_by_dev(pci->dev);
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if (unlikely(rover != NULL))
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goto fail0;
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/* Insert in ascending order by 'pci_idx', so find position */
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list_for_each(item, &edac_pci_list) {
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rover = list_entry(item, struct edac_pci_ctl_info, link);
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if (rover->pci_idx >= pci->pci_idx) {
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if (unlikely(rover->pci_idx == pci->pci_idx))
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goto fail1;
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insert_before = item;
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break;
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}
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}
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list_add_tail_rcu(&pci->link, insert_before);
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return 0;
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fail0:
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edac_printk(KERN_WARNING, EDAC_PCI,
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"%s (%s) %s %s already assigned %d\n",
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dev_name(rover->dev), edac_dev_name(rover),
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rover->mod_name, rover->ctl_name, rover->pci_idx);
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return 1;
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fail1:
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edac_printk(KERN_WARNING, EDAC_PCI,
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"but in low-level driver: attempt to assign\n"
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"\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
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__func__);
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return 1;
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}
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/*
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* del_edac_pci_from_global_list
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*
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* remove the PCI control struct from the global list
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*/
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static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
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{
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list_del_rcu(&pci->link);
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/* these are for safe removal of devices from global list while
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* NMI handlers may be traversing list
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*/
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synchronize_rcu();
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INIT_LIST_HEAD(&pci->link);
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}
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#if 0
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/* Older code, but might use in the future */
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/*
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* edac_pci_find()
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* Search for an edac_pci_ctl_info structure whose index is 'idx'
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*
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* If found, return a pointer to the structure
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* Else return NULL.
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*
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* Caller must hold pci_ctls_mutex.
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*/
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struct edac_pci_ctl_info *edac_pci_find(int idx)
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{
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struct list_head *item;
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struct edac_pci_ctl_info *pci;
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/* Iterage over list, looking for exact match of ID */
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list_for_each(item, &edac_pci_list) {
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pci = list_entry(item, struct edac_pci_ctl_info, link);
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if (pci->pci_idx >= idx) {
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if (pci->pci_idx == idx)
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return pci;
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/* not on list, so terminate early */
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break;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL_GPL(edac_pci_find);
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#endif
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/*
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* edac_pci_workq_function()
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*
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* periodic function that performs the operation
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* scheduled by a workq request, for a given PCI control struct
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*/
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static void edac_pci_workq_function(struct work_struct *work_req)
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{
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struct delayed_work *d_work = to_delayed_work(work_req);
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struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
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int msec;
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unsigned long delay;
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edac_dbg(3, "checking\n");
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mutex_lock(&edac_pci_ctls_mutex);
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if (pci->op_state == OP_RUNNING_POLL) {
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/* we might be in POLL mode, but there may NOT be a poll func
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*/
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if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
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pci->edac_check(pci);
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/* if we are on a one second period, then use round */
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msec = edac_pci_get_poll_msec();
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if (msec == 1000)
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delay = round_jiffies_relative(msecs_to_jiffies(msec));
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else
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delay = msecs_to_jiffies(msec);
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/* Reschedule only if we are in POLL mode */
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queue_delayed_work(edac_workqueue, &pci->work, delay);
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}
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mutex_unlock(&edac_pci_ctls_mutex);
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}
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/*
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* edac_pci_workq_setup()
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* initialize a workq item for this edac_pci instance
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* passing in the new delay period in msec
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*
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* locking model:
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* called when 'edac_pci_ctls_mutex' is locked
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*/
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static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
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unsigned int msec)
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{
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edac_dbg(0, "\n");
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INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
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queue_delayed_work(edac_workqueue, &pci->work,
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msecs_to_jiffies(edac_pci_get_poll_msec()));
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}
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/*
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* edac_pci_workq_teardown()
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* stop the workq processing on this edac_pci instance
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*/
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static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
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{
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int status;
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edac_dbg(0, "\n");
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status = cancel_delayed_work(&pci->work);
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if (status == 0)
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flush_workqueue(edac_workqueue);
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}
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/*
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* edac_pci_reset_delay_period
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*
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* called with a new period value for the workq period
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* a) stop current workq timer
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* b) restart workq timer with new value
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*/
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void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
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unsigned long value)
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{
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edac_dbg(0, "\n");
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edac_pci_workq_teardown(pci);
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/* need to lock for the setup */
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mutex_lock(&edac_pci_ctls_mutex);
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edac_pci_workq_setup(pci, value);
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mutex_unlock(&edac_pci_ctls_mutex);
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}
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EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
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/*
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* edac_pci_alloc_index: Allocate a unique PCI index number
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*
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* Return:
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* allocated index number
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*
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*/
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int edac_pci_alloc_index(void)
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{
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return atomic_inc_return(&pci_indexes) - 1;
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}
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EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
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/*
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* edac_pci_add_device: Insert the 'edac_dev' structure into the
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* edac_pci global list and create sysfs entries associated with
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* edac_pci structure.
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* @pci: pointer to the edac_device structure to be added to the list
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* @edac_idx: A unique numeric identifier to be assigned to the
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* 'edac_pci' structure.
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*
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* Return:
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* 0 Success
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* !0 Failure
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*/
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int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
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{
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edac_dbg(0, "\n");
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pci->pci_idx = edac_idx;
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pci->start_time = jiffies;
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mutex_lock(&edac_pci_ctls_mutex);
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if (add_edac_pci_to_global_list(pci))
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goto fail0;
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if (edac_pci_create_sysfs(pci)) {
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edac_pci_printk(pci, KERN_WARNING,
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"failed to create sysfs pci\n");
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goto fail1;
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}
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if (pci->edac_check != NULL) {
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pci->op_state = OP_RUNNING_POLL;
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edac_pci_workq_setup(pci, 1000);
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} else {
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pci->op_state = OP_RUNNING_INTERRUPT;
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}
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edac_pci_printk(pci, KERN_INFO,
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"Giving out device to module '%s' controller '%s':"
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" DEV '%s' (%s)\n",
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pci->mod_name,
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pci->ctl_name,
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edac_dev_name(pci), edac_op_state_to_string(pci->op_state));
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mutex_unlock(&edac_pci_ctls_mutex);
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return 0;
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/* error unwind stack */
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fail1:
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del_edac_pci_from_global_list(pci);
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fail0:
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mutex_unlock(&edac_pci_ctls_mutex);
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return 1;
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}
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EXPORT_SYMBOL_GPL(edac_pci_add_device);
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/*
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* edac_pci_del_device()
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* Remove sysfs entries for specified edac_pci structure and
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* then remove edac_pci structure from global list
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*
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* @dev:
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* Pointer to 'struct device' representing edac_pci structure
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* to remove
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*
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* Return:
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* Pointer to removed edac_pci structure,
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* or NULL if device not found
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*/
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struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
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{
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struct edac_pci_ctl_info *pci;
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edac_dbg(0, "\n");
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mutex_lock(&edac_pci_ctls_mutex);
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/* ensure the control struct is on the global list
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* if not, then leave
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*/
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pci = find_edac_pci_by_dev(dev);
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if (pci == NULL) {
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mutex_unlock(&edac_pci_ctls_mutex);
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return NULL;
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}
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pci->op_state = OP_OFFLINE;
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del_edac_pci_from_global_list(pci);
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mutex_unlock(&edac_pci_ctls_mutex);
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/* stop the workq timer */
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edac_pci_workq_teardown(pci);
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edac_printk(KERN_INFO, EDAC_PCI,
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"Removed device %d for %s %s: DEV %s\n",
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pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
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return pci;
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}
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EXPORT_SYMBOL_GPL(edac_pci_del_device);
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/*
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* edac_pci_generic_check
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*
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* a Generic parity check API
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*/
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static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
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{
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edac_dbg(4, "\n");
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edac_pci_do_parity_check();
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}
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/* free running instance index counter */
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static int edac_pci_idx;
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#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
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struct edac_pci_gen_data {
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int edac_idx;
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};
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/*
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* edac_pci_create_generic_ctl
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*
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* A generic constructor for a PCI parity polling device
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* Some systems have more than one domain of PCI busses.
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* For systems with one domain, then this API will
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* provide for a generic poller.
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*
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* This routine calls the edac_pci_alloc_ctl_info() for
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* the generic device, with default values
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*/
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struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
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const char *mod_name)
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{
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struct edac_pci_ctl_info *pci;
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struct edac_pci_gen_data *pdata;
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pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
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if (!pci)
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return NULL;
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pdata = pci->pvt_info;
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pci->dev = dev;
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dev_set_drvdata(pci->dev, pci);
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pci->dev_name = pci_name(to_pci_dev(dev));
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pci->mod_name = mod_name;
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pci->ctl_name = EDAC_PCI_GENCTL_NAME;
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if (edac_op_state == EDAC_OPSTATE_POLL)
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pci->edac_check = edac_pci_generic_check;
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pdata->edac_idx = edac_pci_idx++;
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if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
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edac_dbg(3, "failed edac_pci_add_device()\n");
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edac_pci_free_ctl_info(pci);
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return NULL;
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}
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return pci;
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}
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EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
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/*
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* edac_pci_release_generic_ctl
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*
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* The release function of a generic EDAC PCI polling device
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*/
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void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
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{
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edac_dbg(0, "pci mod=%s\n", pci->mod_name);
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edac_pci_del_device(pci->dev);
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edac_pci_free_ctl_info(pci);
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}
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EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);
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