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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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66194a74c2
Following is added for the CF-ATA driver: - Platform data strucure instantiation - Platform device enabling code - Platform-specific gpio setup code Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
71 lines
2.1 KiB
C
71 lines
2.1 KiB
C
/* linux/arch/arm/mach-s5pc100/setup-ide.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5PC100 setup information for IDE
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <mach/regs-clock.h>
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#include <plat/gpio-cfg.h>
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void s5pc100_ide_setup_gpio(void)
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{
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u32 reg;
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u32 gpio = 0;
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/* Independent CF interface, CF chip select configuration */
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reg = readl(S5PC100_MEM_SYS_CFG) & (~0x3f);
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writel(reg | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S5PC100_MEM_SYS_CFG);
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/* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
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for (gpio = S5PC100_GPJ0(0); gpio <= S5PC100_GPJ0(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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/*CF_Data[0 - 7] */
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for (gpio = S5PC100_GPJ2(0); gpio <= S5PC100_GPJ2(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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/* CF_Data[8 - 15] */
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for (gpio = S5PC100_GPJ3(0); gpio <= S5PC100_GPJ3(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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/* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
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for (gpio = S5PC100_GPJ4(0); gpio <= S5PC100_GPJ4(3); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
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}
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/* EBI_OE, EBI_WE */
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for (gpio = S5PC100_GPK0(6); gpio <= S5PC100_GPK0(7); gpio++)
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0));
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/* CF_OE, CF_WE */
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for (gpio = S5PC100_GPK1(6); gpio <= S5PC100_GPK1(7); gpio++) {
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s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
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}
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/* CF_CD */
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s3c_gpio_cfgpin(S5PC100_GPK3(5), S3C_GPIO_SFN(2));
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s3c_gpio_setpull(S5PC100_GPK3(5), S3C_GPIO_PULL_NONE);
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}
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