mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 02:05:20 +07:00
ce7240e445
This resolves the differences between the original 8250 patch, the revised 8250 patch and the independant clean up of the octeon driver (to use platform devices properly yay!) Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
185 lines
4.5 KiB
C
185 lines
4.5 KiB
C
/*
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* Synopsys DesignWare 8250 driver.
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*
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* Copyright 2011 Picochip, Jamie Iles.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* The Synopsys DesignWare 8250 has an extra feature whereby it detects if the
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* LCR is written whilst busy. If it is, then a busy detect interrupt is
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* raised, the LCR needs to be rewritten and the uart status register read.
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*/
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#include <linux/device.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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struct dw8250_data {
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int last_lcr;
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int line;
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};
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static void dw8250_serial_out(struct uart_port *p, int offset, int value)
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{
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struct dw8250_data *d = p->private_data;
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if (offset == UART_LCR)
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d->last_lcr = value;
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offset <<= p->regshift;
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writeb(value, p->membase + offset);
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}
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static unsigned int dw8250_serial_in(struct uart_port *p, int offset)
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{
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offset <<= p->regshift;
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return readb(p->membase + offset);
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}
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static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
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{
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struct dw8250_data *d = p->private_data;
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if (offset == UART_LCR)
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d->last_lcr = value;
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offset <<= p->regshift;
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writel(value, p->membase + offset);
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}
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static unsigned int dw8250_serial_in32(struct uart_port *p, int offset)
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{
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offset <<= p->regshift;
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return readl(p->membase + offset);
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}
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/* Offset for the DesignWare's UART Status Register. */
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#define UART_USR 0x1f
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static int dw8250_handle_irq(struct uart_port *p)
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{
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struct dw8250_data *d = p->private_data;
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unsigned int iir = p->serial_in(p, UART_IIR);
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if (serial8250_handle_irq(p, iir)) {
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return 1;
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} else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
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/* Clear the USR and write the LCR again. */
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(void)p->serial_in(p, UART_USR);
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p->serial_out(p, d->last_lcr, UART_LCR);
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return 1;
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}
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return 0;
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}
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static int __devinit dw8250_probe(struct platform_device *pdev)
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{
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struct uart_8250_port uart = {};
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struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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struct device_node *np = pdev->dev.of_node;
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u32 val;
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struct dw8250_data *data;
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if (!regs || !irq) {
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dev_err(&pdev->dev, "no registers/irq defined\n");
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return -EINVAL;
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}
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data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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uart.port.private_data = data;
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spin_lock_init(&uart.port.lock);
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uart.port.mapbase = regs->start;
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uart.port.irq = irq->start;
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uart.port.handle_irq = dw8250_handle_irq;
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uart.port.type = PORT_8250;
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uart.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP |
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UPF_FIXED_PORT | UPF_FIXED_TYPE;
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uart.port.dev = &pdev->dev;
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uart.port.iotype = UPIO_MEM;
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uart.port.serial_in = dw8250_serial_in;
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uart.port.serial_out = dw8250_serial_out;
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if (!of_property_read_u32(np, "reg-io-width", &val)) {
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switch (val) {
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case 1:
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break;
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case 4:
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uart.port.iotype = UPIO_MEM32;
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uart.port.serial_in = dw8250_serial_in32;
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uart.port.serial_out = dw8250_serial_out32;
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break;
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default:
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dev_err(&pdev->dev, "unsupported reg-io-width (%u)\n",
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val);
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return -EINVAL;
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}
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}
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if (!of_property_read_u32(np, "reg-shift", &val))
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uart.port.regshift = val;
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if (of_property_read_u32(np, "clock-frequency", &val)) {
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dev_err(&pdev->dev, "no clock-frequency property set\n");
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return -EINVAL;
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}
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uart.port.uartclk = val;
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data->line = serial8250_register_8250_port(&uart);
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if (data->line < 0)
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return data->line;
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platform_set_drvdata(pdev, data);
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return 0;
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}
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static int __devexit dw8250_remove(struct platform_device *pdev)
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{
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struct dw8250_data *data = platform_get_drvdata(pdev);
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serial8250_unregister_port(data->line);
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return 0;
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}
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static const struct of_device_id dw8250_match[] = {
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{ .compatible = "snps,dw-apb-uart" },
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{ /* Sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, dw8250_match);
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static struct platform_driver dw8250_platform_driver = {
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.driver = {
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.name = "dw-apb-uart",
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.owner = THIS_MODULE,
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.of_match_table = dw8250_match,
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},
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.probe = dw8250_probe,
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.remove = __devexit_p(dw8250_remove),
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};
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module_platform_driver(dw8250_platform_driver);
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MODULE_AUTHOR("Jamie Iles");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver");
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