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e0cb1b8416
According to the datasheet, SDn clocks are from the SDSRC clock. And
the SDSRC has a 1/2 divider. So, we should have ".sdsrc" as an internal
core clock. Otherwise, since the sdhi driver will calculate clock for
a sd card using the wrong parent clock rate, and then performance will
be not good.
Fixes:
|
||
|---|---|---|
| .. | ||
| clk-div6.c | ||
| clk-div6.h | ||
| clk-emev2.c | ||
| clk-mstp.c | ||
| clk-r8a73a4.c | ||
| clk-r8a7740.c | ||
| clk-r8a7778.c | ||
| clk-r8a7779.c | ||
| clk-rcar-gen2.c | ||
| clk-rz.c | ||
| clk-sh73a0.c | ||
| Kconfig | ||
| Makefile | ||
| r8a7795-cpg-mssr.c | ||
| r8a7796-cpg-mssr.c | ||
| rcar-gen3-cpg.c | ||
| rcar-gen3-cpg.h | ||
| renesas-cpg-mssr.c | ||
| renesas-cpg-mssr.h | ||