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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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65b5732d24
Some 32-bit (ARMv7) systems are architected like this: * The firmware doesn't know and doesn't care about hypervisor mode and we don't want to add the complexity of hypervisor there. * The firmware isn't involved in SMP bringup or resume. * The ARCH timer come up with an uninitialized offset (CNTVOFF) between the virtual and physical counters. Each core gets a different random offset. * The device boots in "Secure SVC" mode. * Nothing has touched the reset value of CNTHCTL.PL1PCEN or CNTHCTL.PL1PCTEN (both default to 1 at reset) On systems like the above, it doesn't make sense to use the virtual counter. There's nobody managing the offset and each time a core goes down and comes back up it will get reinitialized to some other random value. This adds an optional property which can inform the kernel of this situation, and firmware is free to remove the property if it is going to initialize the CNTVOFF registers when each CPU comes out of reset. Currently, the best course of action in this case is to use the physical timer, which is why it is important that CNTHCTL hasn't been changed from its reset value and it's a reasonable assumption given that the firmware has never entered HYP mode. Note that it's been said that on ARMv8 systems the firmware and kernel really can't be architected as described above. That means using the physical timer like this really only makes sense for ARMv7 systems. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net> |
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.. | ||
arc | ||
arm | ||
ata | ||
bus | ||
c6x | ||
clock | ||
cpufreq | ||
crypto | ||
dma | ||
drm | ||
extcon | ||
fb | ||
fuse | ||
gpio | ||
gpu | ||
hid | ||
hsi | ||
hwmon | ||
hwrng | ||
i2c | ||
iio | ||
input | ||
interrupt-controller | ||
iommu | ||
leds | ||
lpddr2 | ||
mailbox | ||
media | ||
memory-controllers | ||
metag | ||
mfd | ||
mipi | ||
mips | ||
misc | ||
mmc | ||
mtd | ||
net | ||
nvec | ||
panel | ||
pci | ||
phy | ||
pinctrl | ||
power | ||
power_supply | ||
powerpc | ||
pps | ||
pwm | ||
regmap | ||
regulator | ||
reserved-memory | ||
reset | ||
rng | ||
rtc | ||
serial | ||
serio | ||
soc | ||
sound | ||
spi | ||
spmi | ||
staging | ||
thermal | ||
timer | ||
ufs | ||
usb | ||
video | ||
virtio | ||
w1 | ||
watchdog | ||
x86 | ||
xillybus | ||
ABI.txt | ||
eeprom.txt | ||
graph.txt | ||
marvell.txt | ||
open-pic.txt | ||
resource-names.txt | ||
submitting-patches.txt | ||
vendor-prefixes.txt | ||
xilinx.txt |