mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 07:09:15 +07:00
f76b9873d7
The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for Vybrid) whereas the register enumeration start from 1 (1-10 for LS1021a and 1-9 for Vybrid). The loop started off from 0 for both iterations and initialized the number of layers inclusive, which is one layer too many. All extensively written registers seem to be unassigned, it seems that the write to those registers did not do any harm in practice. Signed-off-by: Stefan Agner <stefan@agner.ch> |
||
|---|---|---|
| .. | ||
| fsl_dcu_drm_crtc.c | ||
| fsl_dcu_drm_crtc.h | ||
| fsl_dcu_drm_drv.c | ||
| fsl_dcu_drm_drv.h | ||
| fsl_dcu_drm_fbdev.c | ||
| fsl_dcu_drm_kms.c | ||
| fsl_dcu_drm_output.h | ||
| fsl_dcu_drm_plane.c | ||
| fsl_dcu_drm_plane.h | ||
| fsl_dcu_drm_rgb.c | ||
| Kconfig | ||
| Makefile | ||