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6502a34cfd
We will use illegal instruction 0x0000 for handling 2 byte sw breakpoints from user space. As it can be enabled dynamically via a capability, let's move setting of ICTL_OPEREXC to the post creation step, so we avoid any races when enabling that capability just while adding new cpus. Acked-by: Janosch Frank <frankja@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> |
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.. | ||
arm | ||
devices | ||
00-INDEX | ||
api.txt | ||
cpuid.txt | ||
hypercalls.txt | ||
locking.txt | ||
mmu.txt | ||
msr.txt | ||
nested-vmx.txt | ||
ppc-pv.txt | ||
review-checklist.txt | ||
s390-diag.txt | ||
timekeeping.txt |