Bhawanpreet Lakha 64e7f91e7a drm/amd/display: Add DCN3 OPTC ... Add support for programming the DCN3 OPTC (Output Timing Controller) HW Blocks: +--------+ | OPTC | +--------+ | v +--------+ +--------+ | DIO | | DCCG | +--------+ +--------+ Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-07-01 01:59:14 -04:00
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acp	drm: amd/acp: fix broken menu structure	2020-03-13 11:52:35 -04:00
amdgpu	drm/amdgpu: bypass tmr when reserve c2p memory	2020-07-01 01:59:14 -04:00
amdkfd	drm/amdkfd: sienna_cichlid virtual function support	2020-07-01 01:59:11 -04:00
display	drm/amd/display: Add DCN3 OPTC	2020-07-01 01:59:14 -04:00
include	drm/amd/powerplay: and smc dpm info struct for sienna_cichlid	2020-07-01 01:59:13 -04:00
powerplay	drm/amd/powerplay: let PMFW to handle the features disablement on BACO in V2	2020-07-01 01:59:14 -04:00