linux_dsm_epyc7002/Documentation/arm64
Dave Martin 41040cf7c5 arm64/sve: Fix missing SVE/FPSIMD endianness conversions
The in-memory representation of SVE and FPSIMD registers is
different: the FPSIMD V-registers are stored as single 128-bit
host-endian values, whereas SVE registers are stored in an
endianness-invariant byte order.

This means that the two representations differ when running on a
big-endian host.  But we blindly copy data from one representation
to another when converting between the two, resulting in the
register contents being unintentionally byteswapped in certain
situations.  Currently this can be triggered by the first SVE
instruction after a syscall, for example (though the potential
trigger points may vary in future).

So, fix the conversion functions fpsimd_to_sve(), sve_to_fpsimd()
and sve_sync_from_fpsimd_zeropad() to swab where appropriate.

There is no common swahl128() or swab128() that we could use here.
Maybe it would be worth making this generic, but for now add a
simple local hack.

Since the byte order differences are exposed in ABI, also clarify
the documentation.

Cc: Alex Bennée <alex.bennee@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Alan Hayward <alan.hayward@arm.com>
Cc: Julien Grall <julien.grall@arm.com>
Fixes: bc0ee47603 ("arm64/sve: Core task context handling")
Fixes: 8cd969d28f ("arm64/sve: Signal handling support")
Fixes: 43d4da2c45 ("arm64/sve: ptrace and ELF coredump support")
Signed-off-by: Dave Martin <Dave.Martin@arm.com>
[will: Fix typos in comments and docs spotted by Julien]
Signed-off-by: Will Deacon <will.deacon@arm.com>
2019-06-13 10:07:19 +01:00
..
acpi_object_usage.txt
arm-acpi.txt
booting.txt irqchip/gic-v3: Detect if GIC can support pseudo-NMIs 2019-02-06 10:05:21 +00:00
cpu-feature-registers.txt arm64: Expose SVE2 features for userspace 2019-04-23 18:02:00 +01:00
elf_hwcaps.txt arm64: Expose SVE2 features for userspace 2019-04-23 18:02:00 +01:00
hugetlbpage.txt Documentation/arm64: HugeTLB page implementation 2018-10-10 18:08:36 +01:00
legacy_instructions.txt
memory.txt arm64: KVM: Allow mapping of vectors outside of the RAM region 2018-03-19 13:06:46 +00:00
perf.txt arm64: docs: Document perf event attributes 2019-04-24 15:46:26 +01:00
pointer-authentication.txt KVM: arm64: Add userspace flag to enable pointer authentication 2019-04-24 15:30:40 +01:00
silicon-errata.txt arm64: Handle erratum 1418040 as a superset of erratum 1188873 2019-05-23 15:40:30 +01:00
sve.txt arm64/sve: Fix missing SVE/FPSIMD endianness conversions 2019-06-13 10:07:19 +01:00
tagged-pointers.txt