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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6a88c221ac
This patch adds support of external interrupt for gpio[a..k], gpioz Signed-off-by: Ludovic Barre <ludovic.barre@st.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
190 lines
4.2 KiB
Plaintext
190 lines
4.2 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* Copyright (C) STMicroelectronics 2017 - All Rights Reserved
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* Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
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*/
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#include <dt-bindings/pinctrl/stm32-pinfunc.h>
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/ {
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soc {
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pinctrl: pin-controller {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stm32mp157-pinctrl";
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ranges = <0 0x50002000 0xa400>;
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interrupt-parent = <&exti>;
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st,syscfg = <&exti 0x60 0xff>;
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pins-are-numbered;
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gpioa: gpio@50002000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x0 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOA";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 0 16>;
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};
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gpiob: gpio@50003000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x1000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOB";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 16 16>;
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};
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gpioc: gpio@50004000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x2000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOC";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 32 16>;
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};
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gpiod: gpio@50005000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x3000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOD";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 48 16>;
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};
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gpioe: gpio@50006000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x4000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOE";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 64 16>;
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};
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gpiof: gpio@50007000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x5000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOF";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 80 16>;
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};
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gpiog: gpio@50008000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x6000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOG";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 96 16>;
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};
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gpioh: gpio@50009000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x7000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOH";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 112 16>;
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};
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gpioi: gpio@5000a000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x8000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOI";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 128 16>;
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};
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gpioj: gpio@5000b000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x9000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOJ";
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ngpios = <16>;
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gpio-ranges = <&pinctrl 0 144 16>;
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};
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gpiok: gpio@5000c000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0xa000 0x400>;
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clocks = <&clk_pll3_p>;
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st,bank-name = "GPIOK";
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ngpios = <8>;
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gpio-ranges = <&pinctrl 0 160 8>;
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};
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uart4_pins_a: uart4@0 {
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pins1 {
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pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
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bias-disable;
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drive-push-pull;
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slew-rate = <0>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
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bias-disable;
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};
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};
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};
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pinctrl_z: pin-controller-z {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stm32mp157-z-pinctrl";
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ranges = <0 0x54004000 0x400>;
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pins-are-numbered;
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interrupt-parent = <&exti>;
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st,syscfg = <&exti 0x60 0xff>;
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status = "disabled";
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gpioz: gpio@54004000 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0 0x400>;
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clocks = <&clk_pll2_p>;
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st,bank-name = "GPIOZ";
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st,bank-ioport = <11>;
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ngpios = <8>;
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gpio-ranges = <&pinctrl_z 0 400 8>;
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};
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};
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};
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};
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