mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 15:42:49 +07:00
c7f82ea860
The assignment to addr requires a call to get_sem_addr that dereferences
dev, however, this dereference occurs before a null pointer check on dev.
Move this assignment after the null check on dev to avoid a potential null
pointer dereference.
Detected by CoverityScan, CID#1419700 ("Dereference before null check")
Fixes: fd476fa22a
("i2c: designware-baytrail: Add support for cherrytrail")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
188 lines
4.4 KiB
C
188 lines
4.4 KiB
C
/*
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* Intel BayTrail PMIC I2C bus semaphore implementaion
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* Copyright (c) 2014, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/acpi.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/pm_qos.h>
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#include <asm/iosf_mbi.h>
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#include "i2c-designware-core.h"
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#define SEMAPHORE_TIMEOUT 500
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#define PUNIT_SEMAPHORE 0x7
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#define PUNIT_SEMAPHORE_CHT 0x10e
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#define PUNIT_SEMAPHORE_BIT BIT(0)
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#define PUNIT_SEMAPHORE_ACQUIRE BIT(1)
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static unsigned long acquired;
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static u32 get_sem_addr(struct dw_i2c_dev *dev)
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{
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if (dev->flags & MODEL_CHERRYTRAIL)
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return PUNIT_SEMAPHORE_CHT;
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else
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return PUNIT_SEMAPHORE;
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}
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static int get_sem(struct dw_i2c_dev *dev, u32 *sem)
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{
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u32 addr = get_sem_addr(dev);
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u32 data;
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int ret;
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &data);
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if (ret) {
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dev_err(dev->dev, "iosf failed to read punit semaphore\n");
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return ret;
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}
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*sem = data & PUNIT_SEMAPHORE_BIT;
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return 0;
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}
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static void reset_semaphore(struct dw_i2c_dev *dev)
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{
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if (iosf_mbi_modify(BT_MBI_UNIT_PMC, MBI_REG_READ, get_sem_addr(dev),
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0, PUNIT_SEMAPHORE_BIT))
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dev_err(dev->dev, "iosf failed to reset punit semaphore during write\n");
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pm_qos_update_request(&dev->pm_qos, PM_QOS_DEFAULT_VALUE);
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iosf_mbi_call_pmic_bus_access_notifier_chain(MBI_PMIC_BUS_ACCESS_END,
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NULL);
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iosf_mbi_punit_release();
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}
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static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
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{
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u32 addr;
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u32 sem = PUNIT_SEMAPHORE_ACQUIRE;
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int ret;
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unsigned long start, end;
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might_sleep();
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if (!dev || !dev->dev)
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return -ENODEV;
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if (!dev->release_lock)
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return 0;
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iosf_mbi_punit_acquire();
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iosf_mbi_call_pmic_bus_access_notifier_chain(MBI_PMIC_BUS_ACCESS_BEGIN,
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NULL);
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/*
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* Disallow the CPU to enter C6 or C7 state, entering these states
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* requires the punit to talk to the pmic and if this happens while
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* we're holding the semaphore, the SoC hangs.
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*/
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pm_qos_update_request(&dev->pm_qos, 0);
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addr = get_sem_addr(dev);
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/* host driver writes to side band semaphore register */
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ret = iosf_mbi_write(BT_MBI_UNIT_PMC, MBI_REG_WRITE, addr, sem);
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if (ret) {
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dev_err(dev->dev, "iosf punit semaphore request failed\n");
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goto out;
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}
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/* host driver waits for bit 0 to be set in semaphore register */
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start = jiffies;
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end = start + msecs_to_jiffies(SEMAPHORE_TIMEOUT);
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do {
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ret = get_sem(dev, &sem);
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if (!ret && sem) {
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acquired = jiffies;
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dev_dbg(dev->dev, "punit semaphore acquired after %ums\n",
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jiffies_to_msecs(jiffies - start));
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return 0;
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}
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usleep_range(1000, 2000);
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} while (time_before(jiffies, end));
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dev_err(dev->dev, "punit semaphore timed out, resetting\n");
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out:
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reset_semaphore(dev);
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ret = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, addr, &sem);
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if (ret)
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dev_err(dev->dev, "iosf failed to read punit semaphore\n");
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else
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dev_err(dev->dev, "PUNIT SEM: %d\n", sem);
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WARN_ON(1);
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return -ETIMEDOUT;
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}
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static void baytrail_i2c_release(struct dw_i2c_dev *dev)
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{
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if (!dev || !dev->dev)
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return;
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if (!dev->acquire_lock)
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return;
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reset_semaphore(dev);
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dev_dbg(dev->dev, "punit semaphore held for %ums\n",
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jiffies_to_msecs(jiffies - acquired));
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}
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int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev)
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{
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acpi_status status;
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unsigned long long shared_host = 0;
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acpi_handle handle;
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if (!dev || !dev->dev)
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return 0;
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handle = ACPI_HANDLE(dev->dev);
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if (!handle)
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return 0;
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status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
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if (ACPI_FAILURE(status))
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return 0;
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if (!shared_host)
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return 0;
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if (!iosf_mbi_available())
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return -EPROBE_DEFER;
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dev_info(dev->dev, "I2C bus managed by PUNIT\n");
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dev->acquire_lock = baytrail_i2c_acquire;
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dev->release_lock = baytrail_i2c_release;
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dev->pm_disabled = true;
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pm_qos_add_request(&dev->pm_qos, PM_QOS_CPU_DMA_LATENCY,
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PM_QOS_DEFAULT_VALUE);
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return 0;
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}
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void i2c_dw_remove_lock_support(struct dw_i2c_dev *dev)
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{
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if (dev->acquire_lock)
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pm_qos_remove_request(&dev->pm_qos);
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}
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