mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 10:00:03 +07:00
e546e281d3
This patch introduces a guest's framebuffer sharing mechanism based on dma-buf subsystem. With this sharing mechanism, guest's framebuffer can be shared between guest VM and host. v17: - modify VFIO_DEVICE_GET_GFX_DMABUF interface. (Alex) v16: - add x_hot and y_hot. (Gerd) - add flag validation for VFIO_DEVICE_GET_GFX_DMABUF. (Alex) - rebase 4.14.0-rc6. v15: - add VFIO_DEVICE_GET_GFX_DMABUF ABI. (Gerd) - add intel_vgpu_dmabuf_cleanup() to clean up the vGPU's dmabuf. (Gerd) v14: - add PROBE, DMABUF and REGION flags. (Alex) v12: - refine the lifecycle of dmabuf. v9: - remove dma-buf management. (Alex) - track the dma-buf create and release in kernel mode. (Gerd) (Daniel) v8: - refine the dma-buf ioctl definition.(Alex) - add a lock to protect the dmabuf list. (Alex) v7: - release dma-buf related allocations in dma-buf's associated release function. (Alex) - refine ioctl interface for querying plane info or create dma-buf. (Alex) v6: - align the dma-buf life cycle with the vfio device. (Alex) - add the dma-buf related operations in a separate patch. (Gerd) - i915 related changes. (Chris) v5: - fix bug while checking whether the gem obj is gvt's dma-buf when user change caching mode or domains. Add a helper function to do it. (Xiaoguang) - add definition for the query plane and create dma-buf. (Xiaoguang) v4: - fix bug while checking whether the gem obj is gvt's dma-buf when set caching mode or doamins. (Xiaoguang) v3: - declare a new flag I915_GEM_OBJECT_IS_GVT_DMABUF in drm_i915_gem_object to represent the gem obj for gvt's dma-buf. The tiling mode, caching mode and domains can not be changed for this kind of gem object. (Alex) - change dma-buf related information to be more generic. So other vendor can use the same interface. (Alex) v2: - create a management fd for dma-buf operations. (Alex) - alloc gem object's backing storage in gem obj's get_pages() callback. (Chris) Signed-off-by: Tina Zhang <tina.zhang@intel.com> Cc: Alex Williamson <alex.williamson@redhat.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
471 lines
13 KiB
C
471 lines
13 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef __I915_GEM_OBJECT_H__
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#define __I915_GEM_OBJECT_H__
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#include <linux/reservation.h>
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#include <drm/drm_vma_manager.h>
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#include <drm/drm_gem.h>
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#include <drm/drmP.h>
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#include <drm/i915_drm.h>
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#include "i915_gem_request.h"
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#include "i915_selftest.h"
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struct drm_i915_gem_object;
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/*
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* struct i915_lut_handle tracks the fast lookups from handle to vma used
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* for execbuf. Although we use a radixtree for that mapping, in order to
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* remove them as the object or context is closed, we need a secondary list
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* and a translation entry (i915_lut_handle).
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*/
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struct i915_lut_handle {
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struct list_head obj_link;
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struct list_head ctx_link;
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struct i915_gem_context *ctx;
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u32 handle;
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};
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struct drm_i915_gem_object_ops {
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unsigned int flags;
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#define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
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#define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)
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#define I915_GEM_OBJECT_IS_PROXY BIT(2)
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/* Interface between the GEM object and its backing storage.
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* get_pages() is called once prior to the use of the associated set
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* of pages before to binding them into the GTT, and put_pages() is
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* called after we no longer need them. As we expect there to be
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* associated cost with migrating pages between the backing storage
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* and making them available for the GPU (e.g. clflush), we may hold
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* onto the pages after they are no longer referenced by the GPU
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* in case they may be used again shortly (for example migrating the
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* pages to a different memory domain within the GTT). put_pages()
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* will therefore most likely be called when the object itself is
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* being released or under memory pressure (where we attempt to
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* reap pages for the shrinker).
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*/
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int (*get_pages)(struct drm_i915_gem_object *);
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void (*put_pages)(struct drm_i915_gem_object *, struct sg_table *);
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int (*pwrite)(struct drm_i915_gem_object *,
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const struct drm_i915_gem_pwrite *);
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int (*dmabuf_export)(struct drm_i915_gem_object *);
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void (*release)(struct drm_i915_gem_object *);
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};
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struct drm_i915_gem_object {
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struct drm_gem_object base;
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const struct drm_i915_gem_object_ops *ops;
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/**
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* @vma_list: List of VMAs backed by this object
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*
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* The VMA on this list are ordered by type, all GGTT vma are placed
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* at the head and all ppGTT vma are placed at the tail. The different
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* types of GGTT vma are unordered between themselves, use the
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* @vma_tree (which has a defined order between all VMA) to find an
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* exact match.
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*/
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struct list_head vma_list;
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/**
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* @vma_tree: Ordered tree of VMAs backed by this object
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*
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* All VMA created for this object are placed in the @vma_tree for
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* fast retrieval via a binary search in i915_vma_instance().
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* They are also added to @vma_list for easy iteration.
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*/
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struct rb_root vma_tree;
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/**
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* @lut_list: List of vma lookup entries in use for this object.
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*
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* If this object is closed, we need to remove all of its VMA from
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* the fast lookup index in associated contexts; @lut_list provides
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* this translation from object to context->handles_vma.
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*/
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struct list_head lut_list;
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/** Stolen memory for this object, instead of being backed by shmem. */
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struct drm_mm_node *stolen;
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union {
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struct rcu_head rcu;
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struct llist_node freed;
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};
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/**
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* Whether the object is currently in the GGTT mmap.
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*/
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unsigned int userfault_count;
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struct list_head userfault_link;
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struct list_head batch_pool_link;
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I915_SELFTEST_DECLARE(struct list_head st_link);
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unsigned long flags;
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/**
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* Have we taken a reference for the object for incomplete GPU
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* activity?
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*/
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#define I915_BO_ACTIVE_REF 0
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/*
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* Is the object to be mapped as read-only to the GPU
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* Only honoured if hardware has relevant pte bit
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*/
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unsigned long gt_ro:1;
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unsigned int cache_level:3;
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unsigned int cache_coherent:2;
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#define I915_BO_CACHE_COHERENT_FOR_READ BIT(0)
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#define I915_BO_CACHE_COHERENT_FOR_WRITE BIT(1)
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unsigned int cache_dirty:1;
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atomic_t frontbuffer_bits;
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unsigned int frontbuffer_ggtt_origin; /* write once */
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struct i915_gem_active frontbuffer_write;
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/** Current tiling stride for the object, if it's tiled. */
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unsigned int tiling_and_stride;
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#define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
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#define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
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#define STRIDE_MASK (~TILING_MASK)
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/** Count of VMA actually bound by this object */
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unsigned int bind_count;
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unsigned int active_count;
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/** Count of how many global VMA are currently pinned for use by HW */
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unsigned int pin_global;
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struct {
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struct mutex lock; /* protects the pages and their use */
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atomic_t pages_pin_count;
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struct sg_table *pages;
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void *mapping;
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/* TODO: whack some of this into the error state */
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struct i915_page_sizes {
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/**
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* The sg mask of the pages sg_table. i.e the mask of
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* of the lengths for each sg entry.
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*/
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unsigned int phys;
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/**
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* The gtt page sizes we are allowed to use given the
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* sg mask and the supported page sizes. This will
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* express the smallest unit we can use for the whole
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* object, as well as the larger sizes we may be able
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* to use opportunistically.
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*/
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unsigned int sg;
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/**
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* The actual gtt page size usage. Since we can have
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* multiple vma associated with this object we need to
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* prevent any trampling of state, hence a copy of this
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* struct also lives in each vma, therefore the gtt
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* value here should only be read/write through the vma.
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*/
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unsigned int gtt;
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} page_sizes;
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I915_SELFTEST_DECLARE(unsigned int page_mask);
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struct i915_gem_object_page_iter {
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struct scatterlist *sg_pos;
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unsigned int sg_idx; /* in pages, but 32bit eek! */
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struct radix_tree_root radix;
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struct mutex lock; /* protects this cache */
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} get_page;
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/**
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* Element within i915->mm.unbound_list or i915->mm.bound_list,
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* locked by i915->mm.obj_lock.
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*/
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struct list_head link;
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/**
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* Advice: are the backing pages purgeable?
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*/
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unsigned int madv:2;
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/**
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* This is set if the object has been written to since the
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* pages were last acquired.
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*/
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bool dirty:1;
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/**
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* This is set if the object has been pinned due to unknown
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* swizzling.
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*/
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bool quirked:1;
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} mm;
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/** Breadcrumb of last rendering to the buffer.
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* There can only be one writer, but we allow for multiple readers.
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* If there is a writer that necessarily implies that all other
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* read requests are complete - but we may only be lazily clearing
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* the read requests. A read request is naturally the most recent
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* request on a ring, so we may have two different write and read
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* requests on one ring where the write request is older than the
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* read request. This allows for the CPU to read from an active
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* buffer by only waiting for the write to complete.
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*/
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struct reservation_object *resv;
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/** References from framebuffers, locks out tiling changes. */
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unsigned int framebuffer_references;
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/** Record of address bit 17 of each page at last unbind. */
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unsigned long *bit_17;
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union {
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struct i915_gem_userptr {
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uintptr_t ptr;
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unsigned read_only :1;
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struct i915_mm_struct *mm;
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struct i915_mmu_object *mmu_object;
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struct work_struct *work;
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} userptr;
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unsigned long scratch;
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void *gvt_info;
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};
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/** for phys allocated objects */
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struct drm_dma_handle *phys_handle;
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struct reservation_object __builtin_resv;
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};
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static inline struct drm_i915_gem_object *
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to_intel_bo(struct drm_gem_object *gem)
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{
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/* Assert that to_intel_bo(NULL) == NULL */
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BUILD_BUG_ON(offsetof(struct drm_i915_gem_object, base));
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return container_of(gem, struct drm_i915_gem_object, base);
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}
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/**
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* i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
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* @filp: DRM file private date
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* @handle: userspace handle
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*
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* Returns:
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*
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* A pointer to the object named by the handle if such exists on @filp, NULL
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* otherwise. This object is only valid whilst under the RCU read lock, and
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* note carefully the object may be in the process of being destroyed.
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*/
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static inline struct drm_i915_gem_object *
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i915_gem_object_lookup_rcu(struct drm_file *file, u32 handle)
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{
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#ifdef CONFIG_LOCKDEP
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WARN_ON(debug_locks && !lock_is_held(&rcu_lock_map));
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#endif
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return idr_find(&file->object_idr, handle);
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}
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static inline struct drm_i915_gem_object *
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i915_gem_object_lookup(struct drm_file *file, u32 handle)
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{
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struct drm_i915_gem_object *obj;
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rcu_read_lock();
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obj = i915_gem_object_lookup_rcu(file, handle);
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if (obj && !kref_get_unless_zero(&obj->base.refcount))
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obj = NULL;
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rcu_read_unlock();
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return obj;
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}
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__deprecated
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extern struct drm_gem_object *
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drm_gem_object_lookup(struct drm_file *file, u32 handle);
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__attribute__((nonnull))
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static inline struct drm_i915_gem_object *
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i915_gem_object_get(struct drm_i915_gem_object *obj)
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{
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drm_gem_object_reference(&obj->base);
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return obj;
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}
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__deprecated
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extern void drm_gem_object_reference(struct drm_gem_object *);
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__attribute__((nonnull))
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static inline void
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i915_gem_object_put(struct drm_i915_gem_object *obj)
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{
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__drm_gem_object_unreference(&obj->base);
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}
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__deprecated
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extern void drm_gem_object_unreference(struct drm_gem_object *);
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__deprecated
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extern void drm_gem_object_unreference_unlocked(struct drm_gem_object *);
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static inline void i915_gem_object_lock(struct drm_i915_gem_object *obj)
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{
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reservation_object_lock(obj->resv, NULL);
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}
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static inline void i915_gem_object_unlock(struct drm_i915_gem_object *obj)
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{
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reservation_object_unlock(obj->resv);
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}
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static inline bool
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i915_gem_object_has_struct_page(const struct drm_i915_gem_object *obj)
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{
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return obj->ops->flags & I915_GEM_OBJECT_HAS_STRUCT_PAGE;
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}
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static inline bool
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i915_gem_object_is_shrinkable(const struct drm_i915_gem_object *obj)
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{
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return obj->ops->flags & I915_GEM_OBJECT_IS_SHRINKABLE;
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}
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static inline bool
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i915_gem_object_is_proxy(const struct drm_i915_gem_object *obj)
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{
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return obj->ops->flags & I915_GEM_OBJECT_IS_PROXY;
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}
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static inline bool
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i915_gem_object_is_active(const struct drm_i915_gem_object *obj)
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{
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return obj->active_count;
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}
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static inline bool
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i915_gem_object_has_active_reference(const struct drm_i915_gem_object *obj)
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{
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return test_bit(I915_BO_ACTIVE_REF, &obj->flags);
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}
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static inline void
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i915_gem_object_set_active_reference(struct drm_i915_gem_object *obj)
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{
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lockdep_assert_held(&obj->base.dev->struct_mutex);
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__set_bit(I915_BO_ACTIVE_REF, &obj->flags);
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}
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static inline void
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i915_gem_object_clear_active_reference(struct drm_i915_gem_object *obj)
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{
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lockdep_assert_held(&obj->base.dev->struct_mutex);
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__clear_bit(I915_BO_ACTIVE_REF, &obj->flags);
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}
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void __i915_gem_object_release_unless_active(struct drm_i915_gem_object *obj);
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static inline bool
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i915_gem_object_is_framebuffer(const struct drm_i915_gem_object *obj)
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{
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return READ_ONCE(obj->framebuffer_references);
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}
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static inline unsigned int
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i915_gem_object_get_tiling(struct drm_i915_gem_object *obj)
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{
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return obj->tiling_and_stride & TILING_MASK;
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}
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static inline bool
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i915_gem_object_is_tiled(struct drm_i915_gem_object *obj)
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{
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return i915_gem_object_get_tiling(obj) != I915_TILING_NONE;
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}
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static inline unsigned int
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i915_gem_object_get_stride(struct drm_i915_gem_object *obj)
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{
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return obj->tiling_and_stride & STRIDE_MASK;
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}
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static inline unsigned int
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i915_gem_tile_height(unsigned int tiling)
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{
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GEM_BUG_ON(!tiling);
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return tiling == I915_TILING_Y ? 32 : 8;
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}
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static inline unsigned int
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i915_gem_object_get_tile_height(struct drm_i915_gem_object *obj)
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{
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return i915_gem_tile_height(i915_gem_object_get_tiling(obj));
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}
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static inline unsigned int
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i915_gem_object_get_tile_row_size(struct drm_i915_gem_object *obj)
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{
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return (i915_gem_object_get_stride(obj) *
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i915_gem_object_get_tile_height(obj));
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}
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int i915_gem_object_set_tiling(struct drm_i915_gem_object *obj,
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unsigned int tiling, unsigned int stride);
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static inline struct intel_engine_cs *
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i915_gem_object_last_write_engine(struct drm_i915_gem_object *obj)
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{
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struct intel_engine_cs *engine = NULL;
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struct dma_fence *fence;
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rcu_read_lock();
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fence = reservation_object_get_excl_rcu(obj->resv);
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rcu_read_unlock();
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if (fence && dma_fence_is_i915(fence) && !dma_fence_is_signaled(fence))
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engine = to_request(fence)->engine;
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dma_fence_put(fence);
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return engine;
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}
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void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
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unsigned int cache_level);
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void i915_gem_object_flush_if_display(struct drm_i915_gem_object *obj);
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#endif
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