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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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37f6130ec3
Currently, the USB 3.0 PHY in bcm5301x.dtsi uses platform driver which
requires register range "ccb-mii" <0x18003000 0x1000>. This range
overlaps with MDIO cmd and param registers (<0x18003000 0x8>).
Essentially, the platform driver partly acts like a MDIO bus driver,
hence to use of this register range.
In some Northstar devices like Linksys EA9500, secondary switch is
connected via external MDIO. The only way to access and configure the
external switch is via MDIO bus. When we enable the MDIO bus in it's
current state, the MDIO bus and any child buses fail to register because
of the register range overlap.
On Northstar, the USB 3.0 PHY is connected at address 0x10 on the
internal MDIO bus. This change moves the usb3_phy node and makes it a
child node of internal MDIO bus.
Thanks to Rafał Miłecki's commit af850e14a7 ("phy: bcm-ns-usb3: add
MDIO driver using proper bus layer") the same USB 3.0 platform driver
can now act as USB 3.0 PHY MDIO driver.
Tested on Linksys Panamera (EA9500)
Signed-off-by: Vivek Unune <npcomplete13@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
46 lines
770 B
Plaintext
46 lines
770 B
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
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*/
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/dts-v1/;
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#include "bcm4709.dtsi"
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#include "bcm5301x-nand-cs0-bch8.dtsi"
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/ {
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compatible = "linksys,ea9200", "brcm,bcm4709", "brcm,bcm4708";
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model = "Linksys EA9200";
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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memory {
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reg = <0x00000000 0x08000000
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0x88000000 0x08000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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wps {
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label = "WPS";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
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};
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restart {
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label = "Reset";
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linux,code = <KEY_RESTART>;
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gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&usb3_phy {
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status = "okay";
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};
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