Joseph Gravenor 639dcfc6fe drm/amd/display: have two different sr and pstate latency tables for renoir ... [Why] new sr and pstate latencies are optimized for the case when we are not using lpddr4 memory [How] have two different wm tables, one for the lpddr case and one for non lpddr case Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-12-05 16:28:50 -05:00
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acp	drm/amd: Fix Kconfig indentation	2019-11-25 11:20:17 -05:00
amdgpu	drm/amdgpu: reduce redundant uvd context lost warning message	2019-12-05 16:26:20 -05:00
amdkfd	drm/amdkfd: Eliminate unnecessary kernel queue function pointers	2019-12-05 16:24:36 -05:00
display	drm/amd/display: have two different sr and pstate latency tables for renoir	2019-12-05 16:28:50 -05:00
include	drm/amdgpu: refine query function of mmhub EDC counter in vg20	2019-11-22 14:26:46 -05:00
powerplay	drm/amdgpu: add header line for power profile on Arcturus	2019-12-05 16:24:45 -05:00