mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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7e99e34701
Now that ports are dynamically listed in the fabric, there is no need to provide a special helper to allocate the dsa_switch structure. This will give more flexibility to drivers to embed this structure as they wish in their private structure. Signed-off-by: Vivien Didelot <vivien.didelot@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Jakub Kicinski <jakub.kicinski@netronome.com>
317 lines
7.2 KiB
C
317 lines
7.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips
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* Copyright (c) 2008-2009 Marvell Semiconductor
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*/
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#include <linux/delay.h>
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#include <linux/etherdevice.h>
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#include <linux/jiffies.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <net/dsa.h>
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#include "mv88e6060.h"
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static int reg_read(struct mv88e6060_priv *priv, int addr, int reg)
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{
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return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg);
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}
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static int reg_write(struct mv88e6060_priv *priv, int addr, int reg, u16 val)
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{
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return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val);
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}
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static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr)
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{
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int ret;
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ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID);
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if (ret >= 0) {
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if (ret == PORT_SWITCH_ID_6060)
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return "Marvell 88E6060 (A0)";
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if (ret == PORT_SWITCH_ID_6060_R1 ||
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ret == PORT_SWITCH_ID_6060_R2)
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return "Marvell 88E6060 (B0)";
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if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060)
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return "Marvell 88E6060";
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}
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return NULL;
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}
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static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds,
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int port)
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{
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return DSA_TAG_PROTO_TRAILER;
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}
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static int mv88e6060_switch_reset(struct mv88e6060_priv *priv)
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{
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int i;
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int ret;
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unsigned long timeout;
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/* Set all ports to the disabled state. */
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for (i = 0; i < MV88E6060_PORTS; i++) {
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ret = reg_read(priv, REG_PORT(i), PORT_CONTROL);
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if (ret < 0)
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return ret;
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ret = reg_write(priv, REG_PORT(i), PORT_CONTROL,
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ret & ~PORT_CONTROL_STATE_MASK);
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if (ret)
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return ret;
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}
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/* Wait for transmit queues to drain. */
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usleep_range(2000, 4000);
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/* Reset the switch. */
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ret = reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,
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GLOBAL_ATU_CONTROL_SWRESET |
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GLOBAL_ATU_CONTROL_LEARNDIS);
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if (ret)
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return ret;
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/* Wait up to one second for reset to complete. */
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timeout = jiffies + 1 * HZ;
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while (time_before(jiffies, timeout)) {
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ret = reg_read(priv, REG_GLOBAL, GLOBAL_STATUS);
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if (ret < 0)
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return ret;
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if (ret & GLOBAL_STATUS_INIT_READY)
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break;
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usleep_range(1000, 2000);
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}
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if (time_after(jiffies, timeout))
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return -ETIMEDOUT;
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return 0;
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}
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static int mv88e6060_setup_global(struct mv88e6060_priv *priv)
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{
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int ret;
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/* Disable discarding of frames with excessive collisions,
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* set the maximum frame size to 1536 bytes, and mask all
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* interrupt sources.
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*/
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ret = reg_write(priv, REG_GLOBAL, GLOBAL_CONTROL,
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GLOBAL_CONTROL_MAX_FRAME_1536);
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if (ret)
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return ret;
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/* Disable automatic address learning.
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*/
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return reg_write(priv, REG_GLOBAL, GLOBAL_ATU_CONTROL,
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GLOBAL_ATU_CONTROL_LEARNDIS);
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}
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static int mv88e6060_setup_port(struct mv88e6060_priv *priv, int p)
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{
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int addr = REG_PORT(p);
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int ret;
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/* Do not force flow control, disable Ingress and Egress
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* Header tagging, disable VLAN tunneling, and set the port
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* state to Forwarding. Additionally, if this is the CPU
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* port, enable Ingress and Egress Trailer tagging mode.
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*/
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ret = reg_write(priv, addr, PORT_CONTROL,
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dsa_is_cpu_port(priv->ds, p) ?
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PORT_CONTROL_TRAILER |
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PORT_CONTROL_INGRESS_MODE |
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PORT_CONTROL_STATE_FORWARDING :
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PORT_CONTROL_STATE_FORWARDING);
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if (ret)
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return ret;
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/* Port based VLAN map: give each port its own address
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* database, allow the CPU port to talk to each of the 'real'
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* ports, and allow each of the 'real' ports to only talk to
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* the CPU port.
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*/
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ret = reg_write(priv, addr, PORT_VLAN_MAP,
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((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) |
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(dsa_is_cpu_port(priv->ds, p) ?
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dsa_user_ports(priv->ds) :
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BIT(dsa_to_port(priv->ds, p)->cpu_dp->index)));
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if (ret)
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return ret;
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/* Port Association Vector: when learning source addresses
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* of packets, add the address to the address database using
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* a port bitmap that has only the bit for this port set and
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* the other bits clear.
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*/
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return reg_write(priv, addr, PORT_ASSOC_VECTOR, BIT(p));
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}
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static int mv88e6060_setup_addr(struct mv88e6060_priv *priv)
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{
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u8 addr[ETH_ALEN];
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int ret;
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u16 val;
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eth_random_addr(addr);
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val = addr[0] << 8 | addr[1];
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/* The multicast bit is always transmitted as a zero, so the switch uses
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* bit 8 for "DiffAddr", where 0 means all ports transmit the same SA.
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*/
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val &= 0xfeff;
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ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_01, val);
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if (ret)
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return ret;
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ret = reg_write(priv, REG_GLOBAL, GLOBAL_MAC_23,
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(addr[2] << 8) | addr[3]);
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if (ret)
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return ret;
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return reg_write(priv, REG_GLOBAL, GLOBAL_MAC_45,
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(addr[4] << 8) | addr[5]);
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}
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static int mv88e6060_setup(struct dsa_switch *ds)
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{
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struct mv88e6060_priv *priv = ds->priv;
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int ret;
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int i;
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priv->ds = ds;
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ret = mv88e6060_switch_reset(priv);
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if (ret < 0)
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return ret;
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/* @@@ initialise atu */
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ret = mv88e6060_setup_global(priv);
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if (ret < 0)
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return ret;
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ret = mv88e6060_setup_addr(priv);
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if (ret < 0)
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return ret;
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for (i = 0; i < MV88E6060_PORTS; i++) {
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ret = mv88e6060_setup_port(priv, i);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int mv88e6060_port_to_phy_addr(int port)
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{
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if (port >= 0 && port < MV88E6060_PORTS)
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return port;
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return -1;
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}
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static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum)
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{
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struct mv88e6060_priv *priv = ds->priv;
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int addr;
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addr = mv88e6060_port_to_phy_addr(port);
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if (addr == -1)
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return 0xffff;
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return reg_read(priv, addr, regnum);
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}
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static int
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mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
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{
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struct mv88e6060_priv *priv = ds->priv;
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int addr;
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addr = mv88e6060_port_to_phy_addr(port);
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if (addr == -1)
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return 0xffff;
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return reg_write(priv, addr, regnum, val);
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}
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static const struct dsa_switch_ops mv88e6060_switch_ops = {
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.get_tag_protocol = mv88e6060_get_tag_protocol,
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.setup = mv88e6060_setup,
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.phy_read = mv88e6060_phy_read,
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.phy_write = mv88e6060_phy_write,
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};
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static int mv88e6060_probe(struct mdio_device *mdiodev)
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{
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struct device *dev = &mdiodev->dev;
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struct mv88e6060_priv *priv;
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struct dsa_switch *ds;
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const char *name;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->bus = mdiodev->bus;
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priv->sw_addr = mdiodev->addr;
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name = mv88e6060_get_name(priv->bus, priv->sw_addr);
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if (!name)
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return -ENODEV;
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dev_info(dev, "switch %s detected\n", name);
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ds = devm_kzalloc(dev, sizeof(*ds), GFP_KERNEL);
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if (!ds)
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return -ENOMEM;
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ds->dev = dev;
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ds->num_ports = MV88E6060_PORTS;
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ds->priv = priv;
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ds->dev = dev;
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ds->ops = &mv88e6060_switch_ops;
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dev_set_drvdata(dev, ds);
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return dsa_register_switch(ds);
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}
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static void mv88e6060_remove(struct mdio_device *mdiodev)
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{
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struct dsa_switch *ds = dev_get_drvdata(&mdiodev->dev);
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dsa_unregister_switch(ds);
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}
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static const struct of_device_id mv88e6060_of_match[] = {
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{
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.compatible = "marvell,mv88e6060",
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},
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{ /* sentinel */ },
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};
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static struct mdio_driver mv88e6060_driver = {
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.probe = mv88e6060_probe,
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.remove = mv88e6060_remove,
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.mdiodrv.driver = {
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.name = "mv88e6060",
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.of_match_table = mv88e6060_of_match,
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},
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};
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mdio_module_driver(mv88e6060_driver);
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MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>");
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MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:mv88e6060");
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