mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 12:20:50 +07:00
13ccd32b15
For imx35, it needs three clocks to let the controller work, the old code is wrong, and the usbmisc does not include clock handling code any more. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
387 lines
8.8 KiB
Plaintext
387 lines
8.8 KiB
Plaintext
/*
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* Copyright 2012 Steffen Trumtrar, Pengutronix
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*
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* based on imx27.dtsi
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License version 2 as published by the
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* Free Software Foundation.
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*/
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#include "skeleton.dtsi"
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#include "imx35-pinfunc.h"
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/ {
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aliases {
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ethernet0 = &fec;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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spi0 = &spi1;
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spi1 = &spi2;
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};
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cpus {
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm1136jf-s";
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device_type = "cpu";
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};
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};
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avic: avic-interrupt-controller@68000000 {
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compatible = "fsl,imx35-avic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x68000000 0x10000000>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&avic>;
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ranges;
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L2: l2-cache@30000000 {
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compatible = "arm,l210-cache";
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reg = <0x30000000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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aips1: aips@43f00000 {
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compatible = "fsl,aips", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x43f00000 0x100000>;
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ranges;
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i2c1: i2c@43f80000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
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reg = <0x43f80000 0x4000>;
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clocks = <&clks 51>;
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clock-names = "ipg_per";
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interrupts = <10>;
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status = "disabled";
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};
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i2c3: i2c@43f84000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
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reg = <0x43f84000 0x4000>;
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clocks = <&clks 53>;
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clock-names = "ipg_per";
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interrupts = <3>;
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status = "disabled";
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};
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uart1: serial@43f90000 {
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compatible = "fsl,imx35-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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clocks = <&clks 9>, <&clks 70>;
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clock-names = "ipg", "per";
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interrupts = <45>;
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status = "disabled";
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};
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uart2: serial@43f94000 {
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compatible = "fsl,imx35-uart", "fsl,imx21-uart";
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reg = <0x43f94000 0x4000>;
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clocks = <&clks 9>, <&clks 71>;
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clock-names = "ipg", "per";
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interrupts = <32>;
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status = "disabled";
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};
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i2c2: i2c@43f98000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx35-i2c", "fsl,imx1-i2c";
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reg = <0x43f98000 0x4000>;
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clocks = <&clks 52>;
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clock-names = "ipg_per";
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interrupts = <4>;
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status = "disabled";
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};
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ssi1: ssi@43fa0000 {
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#sound-dai-cells = <0>;
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compatible = "fsl,imx35-ssi", "fsl,imx21-ssi";
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reg = <0x43fa0000 0x4000>;
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interrupts = <11>;
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clocks = <&clks 68>;
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dmas = <&sdma 28 0 0>,
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<&sdma 29 0 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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status = "disabled";
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};
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spi1: cspi@43fa4000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx35-cspi";
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reg = <0x43fa4000 0x4000>;
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clocks = <&clks 35 &clks 35>;
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clock-names = "ipg", "per";
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interrupts = <14>;
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status = "disabled";
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};
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iomuxc: iomuxc@43fac000 {
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compatible = "fsl,imx35-iomuxc";
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reg = <0x43fac000 0x4000>;
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};
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};
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spba: spba-bus@50000000 {
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compatible = "fsl,spba-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x50000000 0x100000>;
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ranges;
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uart3: serial@5000c000 {
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compatible = "fsl,imx35-uart", "fsl,imx21-uart";
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reg = <0x5000c000 0x4000>;
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clocks = <&clks 9>, <&clks 72>;
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clock-names = "ipg", "per";
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interrupts = <18>;
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status = "disabled";
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};
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spi2: cspi@50010000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx35-cspi";
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reg = <0x50010000 0x4000>;
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interrupts = <13>;
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clocks = <&clks 36 &clks 36>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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fec: fec@50038000 {
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compatible = "fsl,imx35-fec", "fsl,imx27-fec";
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reg = <0x50038000 0x4000>;
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clocks = <&clks 46>, <&clks 8>;
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clock-names = "ipg", "ahb";
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interrupts = <57>;
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status = "disabled";
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};
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};
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aips2: aips@53f00000 {
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compatible = "fsl,aips", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x53f00000 0x100000>;
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ranges;
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clks: ccm@53f80000 {
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compatible = "fsl,imx35-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>;
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#clock-cells = <1>;
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};
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gpt: timer@53f90000 {
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compatible = "fsl,imx35-gpt", "fsl,imx31-gpt";
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reg = <0x53f90000 0x4000>;
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interrupts = <29>;
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clocks = <&clks 9>, <&clks 50>;
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clock-names = "ipg", "per";
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};
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gpio3: gpio@53fa4000 {
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compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
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reg = <0x53fa4000 0x4000>;
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interrupts = <56>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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esdhc1: esdhc@53fb4000 {
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compatible = "fsl,imx35-esdhc";
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reg = <0x53fb4000 0x4000>;
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interrupts = <7>;
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clocks = <&clks 9>, <&clks 8>, <&clks 43>;
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clock-names = "ipg", "ahb", "per";
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status = "disabled";
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};
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esdhc2: esdhc@53fb8000 {
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compatible = "fsl,imx35-esdhc";
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reg = <0x53fb8000 0x4000>;
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interrupts = <8>;
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clocks = <&clks 9>, <&clks 8>, <&clks 44>;
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clock-names = "ipg", "ahb", "per";
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status = "disabled";
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};
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esdhc3: esdhc@53fbc000 {
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compatible = "fsl,imx35-esdhc";
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reg = <0x53fbc000 0x4000>;
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interrupts = <9>;
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clocks = <&clks 9>, <&clks 8>, <&clks 45>;
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clock-names = "ipg", "ahb", "per";
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status = "disabled";
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};
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audmux: audmux@53fc4000 {
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compatible = "fsl,imx35-audmux", "fsl,imx31-audmux";
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reg = <0x53fc4000 0x4000>;
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status = "disabled";
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};
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gpio1: gpio@53fcc000 {
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compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
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reg = <0x53fcc000 0x4000>;
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interrupts = <52>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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gpio2: gpio@53fd0000 {
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compatible = "fsl,imx35-gpio", "fsl,imx31-gpio";
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reg = <0x53fd0000 0x4000>;
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interrupts = <51>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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sdma: sdma@53fd4000 {
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compatible = "fsl,imx35-sdma";
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reg = <0x53fd4000 0x4000>;
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clocks = <&clks 9>, <&clks 65>;
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clock-names = "ipg", "ahb";
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#dma-cells = <3>;
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interrupts = <34>;
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fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
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};
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wdog: wdog@53fdc000 {
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compatible = "fsl,imx35-wdt", "fsl,imx21-wdt";
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reg = <0x53fdc000 0x4000>;
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clocks = <&clks 74>;
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clock-names = "";
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interrupts = <55>;
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};
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can1: can@53fe4000 {
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compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
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reg = <0x53fe4000 0x1000>;
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clocks = <&clks 33>, <&clks 33>;
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clock-names = "ipg", "per";
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interrupts = <43>;
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status = "disabled";
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};
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can2: can@53fe8000 {
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compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
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reg = <0x53fe8000 0x1000>;
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clocks = <&clks 34>, <&clks 34>;
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clock-names = "ipg", "per";
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interrupts = <44>;
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status = "disabled";
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};
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usbotg: usb@53ff4000 {
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compatible = "fsl,imx35-usb", "fsl,imx27-usb";
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reg = <0x53ff4000 0x0200>;
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interrupts = <37>;
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clocks = <&clks 9>, <&clks 73>, <&clks 28>;
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clock-names = "ipg", "ahb", "per";
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fsl,usbmisc = <&usbmisc 0>;
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fsl,usbphy = <&usbphy0>;
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status = "disabled";
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};
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usbhost1: usb@53ff4400 {
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compatible = "fsl,imx35-usb", "fsl,imx27-usb";
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reg = <0x53ff4400 0x0200>;
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interrupts = <35>;
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clocks = <&clks 9>, <&clks 73>, <&clks 28>;
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clock-names = "ipg", "ahb", "per";
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fsl,usbmisc = <&usbmisc 1>;
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fsl,usbphy = <&usbphy1>;
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dr_mode = "host";
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status = "disabled";
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};
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usbmisc: usbmisc@53ff4600 {
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#index-cells = <1>;
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compatible = "fsl,imx35-usbmisc";
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reg = <0x53ff4600 0x00f>;
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};
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};
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emi@80000000 { /* External Memory Interface */
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compatible = "fsl,emi", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x80000000 0x40000000>;
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ranges;
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nfc: nand@bb000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,imx35-nand", "fsl,imx25-nand";
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reg = <0xbb000000 0x2000>;
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clocks = <&clks 29>;
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clock-names = "";
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interrupts = <33>;
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status = "disabled";
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};
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weim: weim@b8002000 {
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#address-cells = <2>;
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#size-cells = <1>;
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clocks = <&clks 0>;
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compatible = "fsl,imx35-weim", "fsl,imx27-weim";
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reg = <0xb8002000 0x1000>;
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ranges = <
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0 0 0xa0000000 0x8000000
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1 0 0xa8000000 0x8000000
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2 0 0xb0000000 0x2000000
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3 0 0xb2000000 0x2000000
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4 0 0xb4000000 0x2000000
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5 0 0xb6000000 0x2000000
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>;
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status = "disabled";
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};
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};
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};
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usbphy {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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usbphy0: usb-phy@0 {
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reg = <0>;
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compatible = "usb-nop-xceiv";
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};
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usbphy1: usb-phy@1 {
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reg = <1>;
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compatible = "usb-nop-xceiv";
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};
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};
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};
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