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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 17:36:49 +07:00
392ee1e6dd
There are two ways pci_save_state and pci_restore_state are used. As helper functions during suspend/resume, and as helper functions around a hardware reset event. When used as helper functions around a hardware reset event there is no reason to believe the calls will be paired, nor is there a good reason to believe that if we restore the msi state from before the reset that it will match the current msi state. Since arch code may change the msi message without going through the driver, drivers currently do not have enough information to even know when to call pci_save_state to ensure they will have msi state in sync with the other kernel irq reception data structures. It turns out the solution is straight forward, cache the state in the existing msi data structures (not the magic pci saved things) and have the msi code update the cached state each time we write to the hardware. This means we never need to read the hardware to figure out what the hardware state should be. By modifying the caching in this manner we get to remove our save_state routines and only need to provide restore_state routines. The only fields that were at all tricky to regenerate were the msi and msi-x control registers and the way we regenerate them currently is a bit dependent upon assumptions on how we use the allow msi registers to be configured and used making the code a little bit brittle. If we ever change what cases we allow or how we configure the msi bits we can address the fragility then. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Acked-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
93 lines
3.5 KiB
C
93 lines
3.5 KiB
C
/* Functions internal to the PCI core code */
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extern int __must_check __pci_reenable_device(struct pci_dev *);
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extern int pci_uevent(struct device *dev, char **envp, int num_envp,
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char *buffer, int buffer_size);
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extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
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extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
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extern void pci_cleanup_rom(struct pci_dev *dev);
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extern int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
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resource_size_t size, resource_size_t align,
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resource_size_t min, unsigned int type_mask,
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void (*alignf)(void *, struct resource *,
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resource_size_t, resource_size_t),
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void *alignf_data);
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/* Firmware callbacks */
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extern int (*platform_pci_choose_state)(struct pci_dev *dev, pm_message_t state);
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extern int (*platform_pci_set_power_state)(struct pci_dev *dev, pci_power_t state);
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extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
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extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
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extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
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extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
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extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
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extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
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/* PCI /proc functions */
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#ifdef CONFIG_PROC_FS
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extern int pci_proc_attach_device(struct pci_dev *dev);
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extern int pci_proc_detach_device(struct pci_dev *dev);
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extern int pci_proc_detach_bus(struct pci_bus *bus);
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#else
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static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
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static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
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static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
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#endif
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/* Functions for PCI Hotplug drivers to use */
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extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
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extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
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extern void pci_remove_legacy_files(struct pci_bus *bus);
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/* Lock for read/write access to pci device and bus lists */
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extern struct rw_semaphore pci_bus_sem;
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extern unsigned int pci_pm_d3_delay;
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#ifdef CONFIG_PCI_MSI
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void pci_no_msi(void);
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#else
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static inline void pci_no_msi(void) { }
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#endif
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#if defined(CONFIG_PCI_MSI) && defined(CONFIG_PM)
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void pci_restore_msi_state(struct pci_dev *dev);
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#else
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static inline void pci_restore_msi_state(struct pci_dev *dev) {}
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#endif
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static inline int pci_no_d1d2(struct pci_dev *dev)
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{
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unsigned int parent_dstates = 0;
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if (dev->bus->self)
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parent_dstates = dev->bus->self->no_d1d2;
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return (dev->no_d1d2 || parent_dstates);
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}
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extern int pcie_mch_quirk;
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extern struct device_attribute pci_dev_attrs[];
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extern struct class_device_attribute class_device_attr_cpuaffinity;
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/**
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* pci_match_one_device - Tell if a PCI device structure has a matching
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* PCI device id structure
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* @id: single PCI device id structure to match
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* @dev: the PCI device structure to match against
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*
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* Returns the matching pci_device_id structure or %NULL if there is no match.
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*/
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static inline const struct pci_device_id *
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pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
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{
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if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
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(id->device == PCI_ANY_ID || id->device == dev->device) &&
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(id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
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(id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
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!((id->class ^ dev->class) & id->class_mask))
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return id;
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return NULL;
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}
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