mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 21:26:43 +07:00
f8c95fe6d9
Extend imx6q DEBUG_LL uart port selection support to cover all i.MX SoCs. The 'range' of the Kconfig option gets dropped, as users looking at the option must know the uart number on his board. The bottom line is that the build system will report an error if an invalid port number is picked for given SoC. The header arch/arm/include/debug/imx-uart.h is created to accommodate all the uart base addresses. And the header will also be used for other low-level debug facility later. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
89 lines
3.2 KiB
C
89 lines
3.2 KiB
C
/*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __DEBUG_IMX_UART_H
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#define __DEBUG_IMX_UART_H
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#define IMX1_UART1_BASE_ADDR 0x00206000
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#define IMX1_UART2_BASE_ADDR 0x00207000
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#define IMX1_UART_BASE_ADDR(n) IMX1_UART##n##_BASE_ADDR
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#define IMX1_UART_BASE(n) IMX1_UART_BASE_ADDR(n)
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#define IMX21_UART1_BASE_ADDR 0x1000a000
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#define IMX21_UART2_BASE_ADDR 0x1000b000
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#define IMX21_UART3_BASE_ADDR 0x1000c000
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#define IMX21_UART4_BASE_ADDR 0x1000d000
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#define IMX21_UART_BASE_ADDR(n) IMX21_UART##n##_BASE_ADDR
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#define IMX21_UART_BASE(n) IMX21_UART_BASE_ADDR(n)
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#define IMX25_UART1_BASE_ADDR 0x43f90000
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#define IMX25_UART2_BASE_ADDR 0x43f94000
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#define IMX25_UART3_BASE_ADDR 0x5000c000
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#define IMX25_UART4_BASE_ADDR 0x50008000
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#define IMX25_UART5_BASE_ADDR 0x5002c000
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#define IMX25_UART_BASE_ADDR(n) IMX25_UART##n##_BASE_ADDR
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#define IMX25_UART_BASE(n) IMX25_UART_BASE_ADDR(n)
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#define IMX31_UART1_BASE_ADDR 0x43f90000
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#define IMX31_UART2_BASE_ADDR 0x43f94000
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#define IMX31_UART3_BASE_ADDR 0x5000c000
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#define IMX31_UART4_BASE_ADDR 0x43fb0000
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#define IMX31_UART5_BASE_ADDR 0x43fb4000
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#define IMX31_UART_BASE_ADDR(n) IMX31_UART##n##_BASE_ADDR
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#define IMX31_UART_BASE(n) IMX31_UART_BASE_ADDR(n)
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#define IMX35_UART1_BASE_ADDR 0x43f90000
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#define IMX35_UART2_BASE_ADDR 0x43f94000
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#define IMX35_UART3_BASE_ADDR 0x5000c000
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#define IMX35_UART_BASE_ADDR(n) IMX35_UART##n##_BASE_ADDR
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#define IMX35_UART_BASE(n) IMX35_UART_BASE_ADDR(n)
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#define IMX51_UART1_BASE_ADDR 0x73fbc000
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#define IMX51_UART2_BASE_ADDR 0x73fc0000
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#define IMX51_UART3_BASE_ADDR 0x7000c000
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#define IMX51_UART_BASE_ADDR(n) IMX51_UART##n##_BASE_ADDR
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#define IMX51_UART_BASE(n) IMX51_UART_BASE_ADDR(n)
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#define IMX53_UART1_BASE_ADDR 0x53fbc000
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#define IMX53_UART2_BASE_ADDR 0x53fc0000
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#define IMX53_UART3_BASE_ADDR 0x5000c000
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#define IMX53_UART4_BASE_ADDR 0x53ff0000
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#define IMX53_UART5_BASE_ADDR 0x63f90000
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#define IMX53_UART_BASE_ADDR(n) IMX53_UART##n##_BASE_ADDR
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#define IMX53_UART_BASE(n) IMX53_UART_BASE_ADDR(n)
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#define IMX6Q_UART1_BASE_ADDR 0x02020000
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#define IMX6Q_UART2_BASE_ADDR 0x021e8000
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#define IMX6Q_UART3_BASE_ADDR 0x021ec000
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#define IMX6Q_UART4_BASE_ADDR 0x021f0000
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#define IMX6Q_UART5_BASE_ADDR 0x021f4000
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#define IMX6Q_UART_BASE_ADDR(n) IMX6Q_UART##n##_BASE_ADDR
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#define IMX6Q_UART_BASE(n) IMX6Q_UART_BASE_ADDR(n)
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#define IMX_DEBUG_UART_BASE(soc) soc##_UART_BASE(CONFIG_DEBUG_IMX_UART_PORT)
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#ifdef CONFIG_DEBUG_IMX1_UART
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX1)
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#elif defined(CONFIG_DEBUG_IMX21_IMX27_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX21)
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#elif defined(CONFIG_DEBUG_IMX25_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX25)
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#elif defined(CONFIG_DEBUG_IMX31_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX31)
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#elif defined(CONFIG_DEBUG_IMX35_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX35)
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#elif defined(CONFIG_DEBUG_IMX51_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX51)
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#elif defined(CONFIG_DEBUG_IMX53_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX53)
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#elif defined(CONFIG_DEBUG_IMX6Q_UART)
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#define UART_PADDR IMX_DEBUG_UART_BASE(IMX6Q)
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#endif
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#endif /* __DEBUG_IMX_UART_H */
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