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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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612a9aab56
Pull drm merge (part 1) from Dave Airlie: "So first of all my tree and uapi stuff has a conflict mess, its my fault as the nouveau stuff didn't hit -next as were trying to rebase regressions out of it before we merged. Highlights: - SH mobile modesetting driver and associated helpers - some DRM core documentation - i915 modesetting rework, haswell hdmi, haswell and vlv fixes, write combined pte writing, ilk rc6 support, - nouveau: major driver rework into a hw core driver, makes features like SLI a lot saner to implement, - psb: add eDP/DP support for Cedarview - radeon: 2 layer page tables, async VM pte updates, better PLL selection for > 2 screens, better ACPI interactions The rest is general grab bag of fixes. So why part 1? well I have the exynos pull req which came in a bit late but was waiting for me to do something they shouldn't have and it looks fairly safe, and David Howells has some more header cleanups he'd like me to pull, that seem like a good idea, but I'd like to get this merge out of the way so -next dosen't get blocked." Tons of conflicts mostly due to silly include line changes, but mostly mindless. A few other small semantic conflicts too, noted from Dave's pre-merged branch. * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (447 commits) drm/nv98/crypt: fix fuc build with latest envyas drm/nouveau/devinit: fixup various issues with subdev ctor/init ordering drm/nv41/vm: fix and enable use of "real" pciegart drm/nv44/vm: fix and enable use of "real" pciegart drm/nv04/dmaobj: fixup vm target handling in preparation for nv4x pcie drm/nouveau: store supported dma mask in vmmgr drm/nvc0/ibus: initial implementation of subdev drm/nouveau/therm: add support for fan-control modes drm/nouveau/hwmon: rename pwm0* to pmw1* to follow hwmon's rules drm/nouveau/therm: calculate the pwm divisor on nv50+ drm/nouveau/fan: rewrite the fan tachometer driver to get more precision, faster drm/nouveau/therm: move thermal-related functions to the therm subdev drm/nouveau/bios: parse the pwm divisor from the perf table drm/nouveau/therm: use the EXTDEV table to detect i2c monitoring devices drm/nouveau/therm: rework thermal table parsing drm/nouveau/gpio: expose the PWM/TOGGLE parameter found in the gpio vbios table drm/nouveau: fix pm initialization order drm/nouveau/bios: check that fixed tvdac gpio data is valid before using it drm/nouveau: log channel debug/error messages from client object rather than drm client drm/nouveau: have drm debugging macros build on top of core macros ...
186 lines
5.6 KiB
C
186 lines
5.6 KiB
C
/*
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* Copyright © 2008-2010 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Eric Anholt <eric@anholt.net>
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* Chris Wilson <chris@chris-wilson.co.uuk>
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*
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*/
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#include <drm/drmP.h>
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#include "i915_drv.h"
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#include <drm/i915_drm.h>
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#include "i915_trace.h"
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static bool
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mark_free(struct drm_i915_gem_object *obj, struct list_head *unwind)
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{
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if (obj->pin_count)
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return false;
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list_add(&obj->exec_list, unwind);
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return drm_mm_scan_add_block(obj->gtt_space);
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}
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int
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i915_gem_evict_something(struct drm_device *dev, int min_size,
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unsigned alignment, unsigned cache_level,
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bool mappable, bool nonblocking)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct list_head eviction_list, unwind_list;
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struct drm_i915_gem_object *obj;
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int ret = 0;
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trace_i915_gem_evict(dev, min_size, alignment, mappable);
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/*
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* The goal is to evict objects and amalgamate space in LRU order.
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* The oldest idle objects reside on the inactive list, which is in
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* retirement order. The next objects to retire are those on the (per
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* ring) active list that do not have an outstanding flush. Once the
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* hardware reports completion (the seqno is updated after the
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* batchbuffer has been finished) the clean buffer objects would
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* be retired to the inactive list. Any dirty objects would be added
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* to the tail of the flushing list. So after processing the clean
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* active objects we need to emit a MI_FLUSH to retire the flushing
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* list, hence the retirement order of the flushing list is in
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* advance of the dirty objects on the active lists.
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*
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* The retirement sequence is thus:
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* 1. Inactive objects (already retired)
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* 2. Clean active objects
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* 3. Flushing list
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* 4. Dirty active objects.
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*
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* On each list, the oldest objects lie at the HEAD with the freshest
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* object on the TAIL.
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*/
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INIT_LIST_HEAD(&unwind_list);
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if (mappable)
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drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
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min_size, alignment, cache_level,
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0, dev_priv->mm.gtt_mappable_end);
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else
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drm_mm_init_scan(&dev_priv->mm.gtt_space,
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min_size, alignment, cache_level);
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/* First see if there is a large enough contiguous idle region... */
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list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
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if (mark_free(obj, &unwind_list))
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goto found;
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}
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if (nonblocking)
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goto none;
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/* Now merge in the soon-to-be-expired objects... */
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list_for_each_entry(obj, &dev_priv->mm.active_list, mm_list) {
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if (mark_free(obj, &unwind_list))
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goto found;
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}
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none:
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/* Nothing found, clean up and bail out! */
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while (!list_empty(&unwind_list)) {
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obj = list_first_entry(&unwind_list,
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struct drm_i915_gem_object,
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exec_list);
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ret = drm_mm_scan_remove_block(obj->gtt_space);
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BUG_ON(ret);
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list_del_init(&obj->exec_list);
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}
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/* We expect the caller to unpin, evict all and try again, or give up.
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* So calling i915_gem_evict_everything() is unnecessary.
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*/
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return -ENOSPC;
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found:
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/* drm_mm doesn't allow any other other operations while
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* scanning, therefore store to be evicted objects on a
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* temporary list. */
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INIT_LIST_HEAD(&eviction_list);
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while (!list_empty(&unwind_list)) {
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obj = list_first_entry(&unwind_list,
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struct drm_i915_gem_object,
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exec_list);
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if (drm_mm_scan_remove_block(obj->gtt_space)) {
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list_move(&obj->exec_list, &eviction_list);
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drm_gem_object_reference(&obj->base);
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continue;
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}
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list_del_init(&obj->exec_list);
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}
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/* Unbinding will emit any required flushes */
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while (!list_empty(&eviction_list)) {
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obj = list_first_entry(&eviction_list,
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struct drm_i915_gem_object,
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exec_list);
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if (ret == 0)
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ret = i915_gem_object_unbind(obj);
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list_del_init(&obj->exec_list);
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drm_gem_object_unreference(&obj->base);
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}
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return ret;
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}
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int
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i915_gem_evict_everything(struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_i915_gem_object *obj, *next;
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bool lists_empty;
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int ret;
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lists_empty = (list_empty(&dev_priv->mm.inactive_list) &&
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list_empty(&dev_priv->mm.active_list));
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if (lists_empty)
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return -ENOSPC;
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trace_i915_gem_evict_everything(dev);
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/* The gpu_idle will flush everything in the write domain to the
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* active list. Then we must move everything off the active list
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* with retire requests.
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*/
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ret = i915_gpu_idle(dev);
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if (ret)
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return ret;
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i915_gem_retire_requests(dev);
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/* Having flushed everything, unbind() should never raise an error */
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list_for_each_entry_safe(obj, next,
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&dev_priv->mm.inactive_list, mm_list)
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if (obj->pin_count == 0)
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WARN_ON(i915_gem_object_unbind(obj));
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return 0;
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}
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