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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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24e44913aa
SoC platform changes. Main theme this merge window: - The Netx platform (Netx 100/500) platform is removed by Linus Walleij-- the SoC doesn't have active maintainers with hardware, and in discussions with the vendor the agreement was that it's OK to remove. - Russell King has a series of patches that cleans up and refactors SA1101 and RiscPC support. -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl0yKOgPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3SNEP/iJsMeeunX0P7Ym3zNFjykhspkkUmo7sEKuz NBcexnQpkm+OLgjfwT7j3kXvOs4mzMzH56J6h7dEDSHbQP1MDIgpMw6OEzMMsQTV XL1AWz1IO7Sq/mG17daPs9c75o6NYQ7pSEd/ncbjKuJQOpGsi4DyrVrhk9WdzYl2 hcs4XOzOMZgDTsXHVdWkfpHazpWxEXPCD7v5bt6ueU0YnT3csUbzOTTvw+55JxRV fYz0lg4wTMRYMQMOejpx1HXwdmbVOHLUYkCxcLUaVqMnm88q/IddJVklBbPGWAU5 Z4gFpL+FxcFhEZtu28CoubPYzf/mHDk8Ry2UWwBiRwiGoKfblomI1fpnbyrX53aE lpO5p7MfOVVV2WNxpbUND+ilbgKOREfRHd314GLPUjwudp2sTuDRZ1GAbt3JwsIM L1HesyjCtb6itCSwGsmmGsX2Wvu+WT7slpsYwHs2qklE/X1zQq0R4Jf2xUNpwqPb FqGZAtc6CCQtyF/Mcpp6OQd+cV0tgQVIw7teKol/xR1dSzN/+1zO1J9UHk9/dWUU sb5lGa/AtBrIbWxS1qLuA5bgyDqxXYDZi0y/Bu1qMHYebRW37z9kvomtzBiMNX2o SAxvr9iGPlTxTjGjRCyBVFmsbCMYLabNoL9tuuXvo+DnjFoOilTef+qePOv7ZYZX kwUyS2eu =FX6e -----END PGP SIGNATURE----- Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC platform updates from Olof Johansson: "SoC platform changes. Main theme this merge window: - The Netx platform (Netx 100/500) platform is removed by Linus Walleij-- the SoC doesn't have active maintainers with hardware, and in discussions with the vendor the agreement was that it's OK to remove. - Russell King has a series of patches that cleans up and refactors SA1101 and RiscPC support" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (47 commits) ARM: stm32: use "depends on" instead of "if" after prompt ARM: sa1100: convert to common clock framework ARM: exynos: Cleanup cppcheck shifting warning ARM: pxa/lubbock: remove lubbock_set_misc_wr() from global view ARM: exynos: Only build MCPM support if used arm: add missing include platform-data/atmel.h ARM: davinci: Use GPIO lookup table for DA850 LEDs ARM: OMAP2: drop explicit assembler architecture ARM: use arch_extension directive instead of arch argument ARM: imx: Switch imx7d to imx-cpufreq-dt for speed-grading ARM: bcm: Enable PINCTRL for ARCH_BRCMSTB ARM: bcm: Enable ARCH_HAS_RESET_CONTROLLER for ARCH_BRCMSTB ARM: riscpc: enable chained scatterlist support ARM: riscpc: reduce IRQ handling code ARM: riscpc: move RiscPC assembly files from arch/arm/lib to mach-rpc ARM: riscpc: parse video information from tagged list ARM: riscpc: add ecard quirk for Atomwide 3port serial card MAINTAINERS: mvebu: Add git entry soc: ti: pm33xx: Add a print while entering RTC only mode with DDR in self-refresh ARM: OMAP2+: Make some variables static ...
122 lines
2.6 KiB
C
122 lines
2.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*/
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#include <linux/irqchip.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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static int ar8031_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* Set RGMII IO voltage to 1.8V */
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phy_write(dev, 0x1d, 0x1f);
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phy_write(dev, 0x1e, 0x8);
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/* disable phy AR8031 SmartEEE function. */
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phy_write(dev, 0xd, 0x3);
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phy_write(dev, 0xe, 0x805d);
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phy_write(dev, 0xd, 0x4003);
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val = phy_read(dev, 0xe);
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val &= ~(0x1 << 8);
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phy_write(dev, 0xe, val);
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/* introduce tx clock delay */
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phy_write(dev, 0x1d, 0x5);
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val = phy_read(dev, 0x1e);
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val |= 0x0100;
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phy_write(dev, 0x1e, val);
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return 0;
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}
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static int bcm54220_phy_fixup(struct phy_device *dev)
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{
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/* enable RXC skew select RGMII copper mode */
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phy_write(dev, 0x1e, 0x21);
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phy_write(dev, 0x1f, 0x7ea8);
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phy_write(dev, 0x1e, 0x2f);
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phy_write(dev, 0x1f, 0x71b7);
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return 0;
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}
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#define PHY_ID_AR8031 0x004dd074
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#define PHY_ID_BCM54220 0x600d8589
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static void __init imx7d_enet_phy_init(void)
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{
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if (IS_BUILTIN(CONFIG_PHYLIB)) {
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phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
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ar8031_phy_fixup);
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phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,
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bcm54220_phy_fixup);
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}
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}
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static void __init imx7d_enet_clk_sel(void)
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{
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struct regmap *gpr;
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0);
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regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0);
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} else {
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pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n");
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}
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}
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static inline void imx7d_enet_init(void)
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{
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imx7d_enet_phy_init();
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imx7d_enet_clk_sel();
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}
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static void __init imx7d_init_machine(void)
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{
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struct device *parent;
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parent = imx_soc_device_init();
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if (parent == NULL)
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pr_warn("failed to initialize soc device\n");
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imx_anatop_init();
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imx7d_enet_init();
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}
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static void __init imx7d_init_late(void)
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{
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if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT))
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platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0);
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}
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static void __init imx7d_init_irq(void)
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{
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imx_init_revision_from_anatop();
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imx_src_init();
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irqchip_init();
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}
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static const char *const imx7d_dt_compat[] __initconst = {
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"fsl,imx7d",
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"fsl,imx7s",
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NULL,
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};
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DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual (Device Tree)")
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.init_irq = imx7d_init_irq,
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.init_machine = imx7d_init_machine,
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.init_late = imx7d_init_late,
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.dt_compat = imx7d_dt_compat,
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MACHINE_END
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