mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-03-11 08:18:24 +07:00
![]() Add optional support for the Reset Control feature of the Renesas Clock Pulse Generator / Module Standby and Software Reset module on R-Car Gen2, R-Car Gen3, and RZ/G1 SoCs. This allows to reset SoC devices using the Reset Controller API. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> |
||
---|---|---|
.. | ||
clk-div6.c | ||
clk-div6.h | ||
clk-emev2.c | ||
clk-mstp.c | ||
clk-r8a73a4.c | ||
clk-r8a7740.c | ||
clk-r8a7778.c | ||
clk-r8a7779.c | ||
clk-rcar-gen2.c | ||
clk-rz.c | ||
clk-sh73a0.c | ||
Kconfig | ||
Makefile | ||
r8a7743-cpg-mssr.c | ||
r8a7745-cpg-mssr.c | ||
r8a7795-cpg-mssr.c | ||
r8a7796-cpg-mssr.c | ||
rcar-gen2-cpg.c | ||
rcar-gen2-cpg.h | ||
rcar-gen3-cpg.c | ||
rcar-gen3-cpg.h | ||
renesas-cpg-mssr.c | ||
renesas-cpg-mssr.h |