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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6170a97460
This patch introduces the atomic, mutex and futex operations. Many atomic operations use the load-acquire and store-release operations which imply barriers, avoiding the need for explicit DMB. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> |
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.. | ||
asm-offsets.h | ||
assembler.h | ||
atomic.h | ||
cache.h | ||
cacheflush.h | ||
cachetype.h | ||
cputable.h | ||
cputype.h | ||
futex.h | ||
hardirq.h | ||
irq.h | ||
irqflags.h | ||
memblock.h | ||
memory.h | ||
mmu_context.h | ||
mmu.h | ||
page.h | ||
pgalloc.h | ||
pgtable-2level-hwdef.h | ||
pgtable-2level-types.h | ||
pgtable-3level-hwdef.h | ||
pgtable-3level-types.h | ||
pgtable-hwdef.h | ||
pgtable.h | ||
proc-fns.h | ||
processor.h | ||
ptrace.h | ||
setup.h | ||
sparsemem.h | ||
stacktrace.h | ||
thread_info.h | ||
tlb.h | ||
tlbflush.h | ||
traps.h |