mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 09:42:17 +07:00
420b946977
Upcoming mobile Kepler GPUs (such as GK20A) use the platform bus instead of PCI to which Nouveau is tightly dependent. This patch allows Nouveau to handle platform devices by: - abstracting PCI-dependent functions that were typically used for resource querying and page mapping, - introducing a nv_device_is_pci() function that allows to make PCI-dependent code conditional, - providing a nouveau_drm_platform_probe() function that takes a GPU platform device to be probed. Core code as well as engine/subdev drivers are updated wherever possible to make use of these functions. Some older drivers are too dependent on PCI to be properly updated, but all newer code on which future chips may depend should at least be runnable with platform devices. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
1536 lines
38 KiB
C
1536 lines
38 KiB
C
/*
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* Copyright 2007 Dave Airlied
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* Authors: Dave Airlied <airlied@linux.ie>
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* Ben Skeggs <darktama@iinet.net.au>
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* Jeremy Kolb <jkolb@brandeis.edu>
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*/
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#include <core/engine.h>
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#include <linux/swiotlb.h>
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#include <subdev/fb.h>
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#include <subdev/vm.h>
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#include <subdev/bar.h>
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#include "nouveau_drm.h"
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#include "nouveau_dma.h"
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#include "nouveau_fence.h"
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#include "nouveau_bo.h"
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#include "nouveau_ttm.h"
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#include "nouveau_gem.h"
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/*
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* NV10-NV40 tiling helpers
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*/
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static void
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nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
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u32 addr, u32 size, u32 pitch, u32 flags)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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int i = reg - drm->tile.reg;
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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struct nouveau_fb_tile *tile = &pfb->tile.region[i];
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struct nouveau_engine *engine;
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nouveau_fence_unref(®->fence);
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if (tile->pitch)
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pfb->tile.fini(pfb, i, tile);
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if (pitch)
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pfb->tile.init(pfb, i, addr, size, pitch, flags, tile);
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pfb->tile.prog(pfb, i, tile);
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if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_GR)))
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engine->tile_prog(engine, i);
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if ((engine = nouveau_engine(pfb, NVDEV_ENGINE_MPEG)))
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engine->tile_prog(engine, i);
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}
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static struct nouveau_drm_tile *
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nv10_bo_get_tile_region(struct drm_device *dev, int i)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_drm_tile *tile = &drm->tile.reg[i];
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spin_lock(&drm->tile.lock);
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if (!tile->used &&
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(!tile->fence || nouveau_fence_done(tile->fence)))
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tile->used = true;
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else
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tile = NULL;
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spin_unlock(&drm->tile.lock);
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return tile;
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}
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static void
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nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
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struct nouveau_fence *fence)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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if (tile) {
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spin_lock(&drm->tile.lock);
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tile->fence = nouveau_fence_ref(fence);
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tile->used = false;
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spin_unlock(&drm->tile.lock);
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}
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}
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static struct nouveau_drm_tile *
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nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
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u32 size, u32 pitch, u32 flags)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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struct nouveau_drm_tile *tile, *found = NULL;
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int i;
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for (i = 0; i < pfb->tile.regions; i++) {
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tile = nv10_bo_get_tile_region(dev, i);
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if (pitch && !found) {
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found = tile;
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continue;
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} else if (tile && pfb->tile.region[i].pitch) {
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/* Kill an unused tile region. */
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nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
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}
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nv10_bo_put_tile_region(dev, tile, NULL);
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}
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if (found)
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nv10_bo_update_tile_region(dev, found, addr, size,
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pitch, flags);
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return found;
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}
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static void
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nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
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{
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struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
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struct drm_device *dev = drm->dev;
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struct nouveau_bo *nvbo = nouveau_bo(bo);
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if (unlikely(nvbo->gem.filp))
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DRM_ERROR("bo %p still attached to GEM object\n", bo);
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WARN_ON(nvbo->pin_refcnt > 0);
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nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
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kfree(nvbo);
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}
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static void
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nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
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int *align, int *size)
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{
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct nouveau_device *device = nv_device(drm->device);
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if (device->card_type < NV_50) {
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if (nvbo->tile_mode) {
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if (device->chipset >= 0x40) {
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*align = 65536;
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*size = roundup(*size, 64 * nvbo->tile_mode);
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} else if (device->chipset >= 0x30) {
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*align = 32768;
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*size = roundup(*size, 64 * nvbo->tile_mode);
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} else if (device->chipset >= 0x20) {
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*align = 16384;
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*size = roundup(*size, 64 * nvbo->tile_mode);
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} else if (device->chipset >= 0x10) {
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*align = 16384;
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*size = roundup(*size, 32 * nvbo->tile_mode);
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}
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}
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} else {
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*size = roundup(*size, (1 << nvbo->page_shift));
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*align = max((1 << nvbo->page_shift), *align);
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}
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*size = roundup(*size, PAGE_SIZE);
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}
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int
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nouveau_bo_new(struct drm_device *dev, int size, int align,
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uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
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struct sg_table *sg,
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struct nouveau_bo **pnvbo)
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{
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_bo *nvbo;
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size_t acc_size;
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int ret;
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int type = ttm_bo_type_device;
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int lpg_shift = 12;
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int max_size;
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if (drm->client.base.vm)
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lpg_shift = drm->client.base.vm->vmm->lpg_shift;
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max_size = INT_MAX & ~((1 << lpg_shift) - 1);
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if (size <= 0 || size > max_size) {
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nv_warn(drm, "skipped size %x\n", (u32)size);
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return -EINVAL;
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}
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if (sg)
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type = ttm_bo_type_sg;
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nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
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if (!nvbo)
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return -ENOMEM;
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INIT_LIST_HEAD(&nvbo->head);
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INIT_LIST_HEAD(&nvbo->entry);
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INIT_LIST_HEAD(&nvbo->vma_list);
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nvbo->tile_mode = tile_mode;
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nvbo->tile_flags = tile_flags;
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nvbo->bo.bdev = &drm->ttm.bdev;
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nvbo->page_shift = 12;
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if (drm->client.base.vm) {
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if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
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nvbo->page_shift = drm->client.base.vm->vmm->lpg_shift;
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}
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nouveau_bo_fixup_align(nvbo, flags, &align, &size);
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nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
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nouveau_bo_placement_set(nvbo, flags, 0);
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acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size,
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sizeof(struct nouveau_bo));
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ret = ttm_bo_init(&drm->ttm.bdev, &nvbo->bo, size,
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type, &nvbo->placement,
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align >> PAGE_SHIFT, false, NULL, acc_size, sg,
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nouveau_bo_del_ttm);
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if (ret) {
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/* ttm will call nouveau_bo_del_ttm if it fails.. */
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return ret;
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}
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*pnvbo = nvbo;
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return 0;
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}
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static void
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set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
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{
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*n = 0;
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if (type & TTM_PL_FLAG_VRAM)
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pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
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if (type & TTM_PL_FLAG_TT)
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pl[(*n)++] = TTM_PL_FLAG_TT | flags;
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if (type & TTM_PL_FLAG_SYSTEM)
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pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
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}
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static void
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set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
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{
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct nouveau_fb *pfb = nouveau_fb(drm->device);
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u32 vram_pages = pfb->ram->size >> PAGE_SHIFT;
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if ((nv_device(drm->device)->card_type == NV_10 ||
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nv_device(drm->device)->card_type == NV_11) &&
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nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
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nvbo->bo.mem.num_pages < vram_pages / 4) {
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/*
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* Make sure that the color and depth buffers are handled
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* by independent memory controller units. Up to a 9x
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* speed up when alpha-blending and depth-test are enabled
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* at the same time.
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*/
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if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) {
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nvbo->placement.fpfn = vram_pages / 2;
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nvbo->placement.lpfn = ~0;
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} else {
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nvbo->placement.fpfn = 0;
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nvbo->placement.lpfn = vram_pages / 2;
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}
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}
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}
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void
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nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
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{
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struct ttm_placement *pl = &nvbo->placement;
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uint32_t flags = TTM_PL_MASK_CACHING |
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(nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
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pl->placement = nvbo->placements;
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set_placement_list(nvbo->placements, &pl->num_placement,
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type, flags);
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pl->busy_placement = nvbo->busy_placements;
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set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
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type | busy, flags);
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set_placement_range(nvbo, type);
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}
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int
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nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
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{
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct ttm_buffer_object *bo = &nvbo->bo;
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int ret;
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ret = ttm_bo_reserve(bo, false, false, false, 0);
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if (ret)
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goto out;
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if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
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NV_ERROR(drm, "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
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1 << bo->mem.mem_type, memtype);
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ret = -EINVAL;
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goto out;
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}
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if (nvbo->pin_refcnt++)
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goto out;
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nouveau_bo_placement_set(nvbo, memtype, 0);
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ret = nouveau_bo_validate(nvbo, false, false);
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if (ret == 0) {
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switch (bo->mem.mem_type) {
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case TTM_PL_VRAM:
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drm->gem.vram_available -= bo->mem.size;
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break;
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case TTM_PL_TT:
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drm->gem.gart_available -= bo->mem.size;
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break;
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default:
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break;
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}
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}
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out:
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ttm_bo_unreserve(bo);
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return ret;
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}
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int
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nouveau_bo_unpin(struct nouveau_bo *nvbo)
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{
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struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
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struct ttm_buffer_object *bo = &nvbo->bo;
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int ret, ref;
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ret = ttm_bo_reserve(bo, false, false, false, 0);
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if (ret)
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return ret;
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ref = --nvbo->pin_refcnt;
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WARN_ON_ONCE(ref < 0);
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if (ref)
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goto out;
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nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
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ret = nouveau_bo_validate(nvbo, false, false);
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if (ret == 0) {
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switch (bo->mem.mem_type) {
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case TTM_PL_VRAM:
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drm->gem.vram_available += bo->mem.size;
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break;
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case TTM_PL_TT:
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drm->gem.gart_available += bo->mem.size;
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break;
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default:
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break;
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}
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}
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out:
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ttm_bo_unreserve(bo);
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return ret;
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}
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int
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nouveau_bo_map(struct nouveau_bo *nvbo)
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{
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int ret;
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ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
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if (ret)
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return ret;
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ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
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ttm_bo_unreserve(&nvbo->bo);
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return ret;
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}
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void
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nouveau_bo_unmap(struct nouveau_bo *nvbo)
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{
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if (nvbo)
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ttm_bo_kunmap(&nvbo->kmap);
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}
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int
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nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
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bool no_wait_gpu)
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{
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int ret;
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ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement,
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interruptible, no_wait_gpu);
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if (ret)
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return ret;
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return 0;
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}
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u16
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nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
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{
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bool is_iomem;
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u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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mem = &mem[index];
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if (is_iomem)
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return ioread16_native((void __force __iomem *)mem);
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else
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return *mem;
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}
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|
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void
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nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
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{
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bool is_iomem;
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u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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mem = &mem[index];
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if (is_iomem)
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iowrite16_native(val, (void __force __iomem *)mem);
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else
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*mem = val;
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}
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|
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u32
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nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
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{
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bool is_iomem;
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u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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mem = &mem[index];
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if (is_iomem)
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return ioread32_native((void __force __iomem *)mem);
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else
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return *mem;
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}
|
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|
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void
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nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
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{
|
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bool is_iomem;
|
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u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
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mem = &mem[index];
|
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if (is_iomem)
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iowrite32_native(val, (void __force __iomem *)mem);
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else
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*mem = val;
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}
|
|
|
|
static struct ttm_tt *
|
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nouveau_ttm_tt_create(struct ttm_bo_device *bdev, unsigned long size,
|
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uint32_t page_flags, struct page *dummy_read)
|
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{
|
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#if __OS_HAS_AGP
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struct nouveau_drm *drm = nouveau_bdev(bdev);
|
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struct drm_device *dev = drm->dev;
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|
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if (drm->agp.stat == ENABLED) {
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return ttm_agp_tt_create(bdev, dev->agp->bridge, size,
|
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page_flags, dummy_read);
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}
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#endif
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return nouveau_sgdma_create_ttm(bdev, size, page_flags, dummy_read);
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}
|
|
|
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static int
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nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
|
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{
|
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/* We'll do this from user space. */
|
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return 0;
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}
|
|
|
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static int
|
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nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
|
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struct ttm_mem_type_manager *man)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bdev);
|
|
|
|
switch (type) {
|
|
case TTM_PL_SYSTEM:
|
|
man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
|
|
man->available_caching = TTM_PL_MASK_CACHING;
|
|
man->default_caching = TTM_PL_FLAG_CACHED;
|
|
break;
|
|
case TTM_PL_VRAM:
|
|
if (nv_device(drm->device)->card_type >= NV_50) {
|
|
man->func = &nouveau_vram_manager;
|
|
man->io_reserve_fastpath = false;
|
|
man->use_io_reserve_lru = true;
|
|
} else {
|
|
man->func = &ttm_bo_manager_func;
|
|
}
|
|
man->flags = TTM_MEMTYPE_FLAG_FIXED |
|
|
TTM_MEMTYPE_FLAG_MAPPABLE;
|
|
man->available_caching = TTM_PL_FLAG_UNCACHED |
|
|
TTM_PL_FLAG_WC;
|
|
man->default_caching = TTM_PL_FLAG_WC;
|
|
break;
|
|
case TTM_PL_TT:
|
|
if (nv_device(drm->device)->card_type >= NV_50)
|
|
man->func = &nouveau_gart_manager;
|
|
else
|
|
if (drm->agp.stat != ENABLED)
|
|
man->func = &nv04_gart_manager;
|
|
else
|
|
man->func = &ttm_bo_manager_func;
|
|
|
|
if (drm->agp.stat == ENABLED) {
|
|
man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
|
|
man->available_caching = TTM_PL_FLAG_UNCACHED |
|
|
TTM_PL_FLAG_WC;
|
|
man->default_caching = TTM_PL_FLAG_WC;
|
|
} else {
|
|
man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
|
|
TTM_MEMTYPE_FLAG_CMA;
|
|
man->available_caching = TTM_PL_MASK_CACHING;
|
|
man->default_caching = TTM_PL_FLAG_CACHED;
|
|
}
|
|
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
|
|
{
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
|
|
switch (bo->mem.mem_type) {
|
|
case TTM_PL_VRAM:
|
|
nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
|
|
TTM_PL_FLAG_SYSTEM);
|
|
break;
|
|
default:
|
|
nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
|
|
break;
|
|
}
|
|
|
|
*pl = nvbo->placement;
|
|
}
|
|
|
|
|
|
static int
|
|
nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
|
|
{
|
|
int ret = RING_SPACE(chan, 2);
|
|
if (ret == 0) {
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
|
|
OUT_RING (chan, handle & 0x0000ffff);
|
|
FIRE_RING (chan);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
int ret = RING_SPACE(chan, 10);
|
|
if (ret == 0) {
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0400, 8);
|
|
OUT_RING (chan, upper_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, upper_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, new_mem->num_pages);
|
|
BEGIN_IMC0(chan, NvSubCopy, 0x0300, 0x0386);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nvc0_bo_move_init(struct nouveau_channel *chan, u32 handle)
|
|
{
|
|
int ret = RING_SPACE(chan, 2);
|
|
if (ret == 0) {
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0000, 1);
|
|
OUT_RING (chan, handle);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nvc0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
u64 src_offset = node->vma[0].offset;
|
|
u64 dst_offset = node->vma[1].offset;
|
|
u32 page_count = new_mem->num_pages;
|
|
int ret;
|
|
|
|
page_count = new_mem->num_pages;
|
|
while (page_count) {
|
|
int line_count = (page_count > 8191) ? 8191 : page_count;
|
|
|
|
ret = RING_SPACE(chan, 11);
|
|
if (ret)
|
|
return ret;
|
|
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x030c, 8);
|
|
OUT_RING (chan, upper_32_bits(src_offset));
|
|
OUT_RING (chan, lower_32_bits(src_offset));
|
|
OUT_RING (chan, upper_32_bits(dst_offset));
|
|
OUT_RING (chan, lower_32_bits(dst_offset));
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, line_count);
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
|
|
OUT_RING (chan, 0x00000110);
|
|
|
|
page_count -= line_count;
|
|
src_offset += (PAGE_SIZE * line_count);
|
|
dst_offset += (PAGE_SIZE * line_count);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
u64 src_offset = node->vma[0].offset;
|
|
u64 dst_offset = node->vma[1].offset;
|
|
u32 page_count = new_mem->num_pages;
|
|
int ret;
|
|
|
|
page_count = new_mem->num_pages;
|
|
while (page_count) {
|
|
int line_count = (page_count > 2047) ? 2047 : page_count;
|
|
|
|
ret = RING_SPACE(chan, 12);
|
|
if (ret)
|
|
return ret;
|
|
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0238, 2);
|
|
OUT_RING (chan, upper_32_bits(dst_offset));
|
|
OUT_RING (chan, lower_32_bits(dst_offset));
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x030c, 6);
|
|
OUT_RING (chan, upper_32_bits(src_offset));
|
|
OUT_RING (chan, lower_32_bits(src_offset));
|
|
OUT_RING (chan, PAGE_SIZE); /* src_pitch */
|
|
OUT_RING (chan, PAGE_SIZE); /* dst_pitch */
|
|
OUT_RING (chan, PAGE_SIZE); /* line_length */
|
|
OUT_RING (chan, line_count);
|
|
BEGIN_NVC0(chan, NvSubCopy, 0x0300, 1);
|
|
OUT_RING (chan, 0x00100110);
|
|
|
|
page_count -= line_count;
|
|
src_offset += (PAGE_SIZE * line_count);
|
|
dst_offset += (PAGE_SIZE * line_count);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nva3_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
u64 src_offset = node->vma[0].offset;
|
|
u64 dst_offset = node->vma[1].offset;
|
|
u32 page_count = new_mem->num_pages;
|
|
int ret;
|
|
|
|
page_count = new_mem->num_pages;
|
|
while (page_count) {
|
|
int line_count = (page_count > 8191) ? 8191 : page_count;
|
|
|
|
ret = RING_SPACE(chan, 11);
|
|
if (ret)
|
|
return ret;
|
|
|
|
BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
|
|
OUT_RING (chan, upper_32_bits(src_offset));
|
|
OUT_RING (chan, lower_32_bits(src_offset));
|
|
OUT_RING (chan, upper_32_bits(dst_offset));
|
|
OUT_RING (chan, lower_32_bits(dst_offset));
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, PAGE_SIZE);
|
|
OUT_RING (chan, line_count);
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0300, 1);
|
|
OUT_RING (chan, 0x00000110);
|
|
|
|
page_count -= line_count;
|
|
src_offset += (PAGE_SIZE * line_count);
|
|
dst_offset += (PAGE_SIZE * line_count);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nv98_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
int ret = RING_SPACE(chan, 7);
|
|
if (ret == 0) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0320, 6);
|
|
OUT_RING (chan, upper_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, upper_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, 0x00000000 /* COPY */);
|
|
OUT_RING (chan, new_mem->num_pages << PAGE_SHIFT);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nv84_bo_move_exec(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
int ret = RING_SPACE(chan, 7);
|
|
if (ret == 0) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0304, 6);
|
|
OUT_RING (chan, new_mem->num_pages << PAGE_SHIFT);
|
|
OUT_RING (chan, upper_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[0].offset));
|
|
OUT_RING (chan, upper_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, lower_32_bits(node->vma[1].offset));
|
|
OUT_RING (chan, 0x00000000 /* MODE_COPY, QUERY_NONE */);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
|
|
{
|
|
int ret = RING_SPACE(chan, 6);
|
|
if (ret == 0) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
|
|
OUT_RING (chan, handle);
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0180, 3);
|
|
OUT_RING (chan, NvNotify0);
|
|
OUT_RING (chan, NvDmaFB);
|
|
OUT_RING (chan, NvDmaFB);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_mem *node = old_mem->mm_node;
|
|
u64 length = (new_mem->num_pages << PAGE_SHIFT);
|
|
u64 src_offset = node->vma[0].offset;
|
|
u64 dst_offset = node->vma[1].offset;
|
|
int src_tiled = !!node->memtype;
|
|
int dst_tiled = !!((struct nouveau_mem *)new_mem->mm_node)->memtype;
|
|
int ret;
|
|
|
|
while (length) {
|
|
u32 amount, stride, height;
|
|
|
|
ret = RING_SPACE(chan, 18 + 6 * (src_tiled + dst_tiled));
|
|
if (ret)
|
|
return ret;
|
|
|
|
amount = min(length, (u64)(4 * 1024 * 1024));
|
|
stride = 16 * 4;
|
|
height = amount / stride;
|
|
|
|
if (src_tiled) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0200, 7);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, stride);
|
|
OUT_RING (chan, height);
|
|
OUT_RING (chan, 1);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, 0);
|
|
} else {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0200, 1);
|
|
OUT_RING (chan, 1);
|
|
}
|
|
if (dst_tiled) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x021c, 7);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, stride);
|
|
OUT_RING (chan, height);
|
|
OUT_RING (chan, 1);
|
|
OUT_RING (chan, 0);
|
|
OUT_RING (chan, 0);
|
|
} else {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x021c, 1);
|
|
OUT_RING (chan, 1);
|
|
}
|
|
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0238, 2);
|
|
OUT_RING (chan, upper_32_bits(src_offset));
|
|
OUT_RING (chan, upper_32_bits(dst_offset));
|
|
BEGIN_NV04(chan, NvSubCopy, 0x030c, 8);
|
|
OUT_RING (chan, lower_32_bits(src_offset));
|
|
OUT_RING (chan, lower_32_bits(dst_offset));
|
|
OUT_RING (chan, stride);
|
|
OUT_RING (chan, stride);
|
|
OUT_RING (chan, stride);
|
|
OUT_RING (chan, height);
|
|
OUT_RING (chan, 0x00000101);
|
|
OUT_RING (chan, 0x00000000);
|
|
BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
|
|
OUT_RING (chan, 0);
|
|
|
|
length -= amount;
|
|
src_offset += amount;
|
|
dst_offset += amount;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nv04_bo_move_init(struct nouveau_channel *chan, u32 handle)
|
|
{
|
|
int ret = RING_SPACE(chan, 4);
|
|
if (ret == 0) {
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0000, 1);
|
|
OUT_RING (chan, handle);
|
|
BEGIN_NV04(chan, NvSubCopy, 0x0180, 1);
|
|
OUT_RING (chan, NvNotify0);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static inline uint32_t
|
|
nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
|
|
struct nouveau_channel *chan, struct ttm_mem_reg *mem)
|
|
{
|
|
if (mem->mem_type == TTM_PL_TT)
|
|
return NvDmaTT;
|
|
return NvDmaFB;
|
|
}
|
|
|
|
static int
|
|
nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
|
|
{
|
|
u32 src_offset = old_mem->start << PAGE_SHIFT;
|
|
u32 dst_offset = new_mem->start << PAGE_SHIFT;
|
|
u32 page_count = new_mem->num_pages;
|
|
int ret;
|
|
|
|
ret = RING_SPACE(chan, 3);
|
|
if (ret)
|
|
return ret;
|
|
|
|
BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
|
|
OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
|
|
OUT_RING (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
|
|
|
|
page_count = new_mem->num_pages;
|
|
while (page_count) {
|
|
int line_count = (page_count > 2047) ? 2047 : page_count;
|
|
|
|
ret = RING_SPACE(chan, 11);
|
|
if (ret)
|
|
return ret;
|
|
|
|
BEGIN_NV04(chan, NvSubCopy,
|
|
NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
|
|
OUT_RING (chan, src_offset);
|
|
OUT_RING (chan, dst_offset);
|
|
OUT_RING (chan, PAGE_SIZE); /* src_pitch */
|
|
OUT_RING (chan, PAGE_SIZE); /* dst_pitch */
|
|
OUT_RING (chan, PAGE_SIZE); /* line_length */
|
|
OUT_RING (chan, line_count);
|
|
OUT_RING (chan, 0x00000101);
|
|
OUT_RING (chan, 0x00000000);
|
|
BEGIN_NV04(chan, NvSubCopy, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
|
|
OUT_RING (chan, 0);
|
|
|
|
page_count -= line_count;
|
|
src_offset += (PAGE_SIZE * line_count);
|
|
dst_offset += (PAGE_SIZE * line_count);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
|
|
struct ttm_mem_reg *mem)
|
|
{
|
|
struct nouveau_mem *old_node = bo->mem.mm_node;
|
|
struct nouveau_mem *new_node = mem->mm_node;
|
|
u64 size = (u64)mem->num_pages << PAGE_SHIFT;
|
|
int ret;
|
|
|
|
ret = nouveau_vm_get(nv_client(drm)->vm, size, old_node->page_shift,
|
|
NV_MEM_ACCESS_RW, &old_node->vma[0]);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = nouveau_vm_get(nv_client(drm)->vm, size, new_node->page_shift,
|
|
NV_MEM_ACCESS_RW, &old_node->vma[1]);
|
|
if (ret) {
|
|
nouveau_vm_put(&old_node->vma[0]);
|
|
return ret;
|
|
}
|
|
|
|
nouveau_vm_map(&old_node->vma[0], old_node);
|
|
nouveau_vm_map(&old_node->vma[1], new_node);
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
|
|
bool no_wait_gpu, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
|
|
struct nouveau_channel *chan = drm->ttm.chan;
|
|
struct nouveau_fence *fence;
|
|
int ret;
|
|
|
|
/* create temporary vmas for the transfer and attach them to the
|
|
* old nouveau_mem node, these will get cleaned up after ttm has
|
|
* destroyed the ttm_mem_reg
|
|
*/
|
|
if (nv_device(drm->device)->card_type >= NV_50) {
|
|
ret = nouveau_bo_move_prep(drm, bo, new_mem);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
mutex_lock_nested(&chan->cli->mutex, SINGLE_DEPTH_NESTING);
|
|
ret = nouveau_fence_sync(bo->sync_obj, chan);
|
|
if (ret == 0) {
|
|
ret = drm->ttm.move(chan, bo, &bo->mem, new_mem);
|
|
if (ret == 0) {
|
|
ret = nouveau_fence_new(chan, false, &fence);
|
|
if (ret == 0) {
|
|
ret = ttm_bo_move_accel_cleanup(bo, fence,
|
|
evict,
|
|
no_wait_gpu,
|
|
new_mem);
|
|
nouveau_fence_unref(&fence);
|
|
}
|
|
}
|
|
}
|
|
mutex_unlock(&chan->cli->mutex);
|
|
return ret;
|
|
}
|
|
|
|
void
|
|
nouveau_bo_move_init(struct nouveau_drm *drm)
|
|
{
|
|
static const struct {
|
|
const char *name;
|
|
int engine;
|
|
u32 oclass;
|
|
int (*exec)(struct nouveau_channel *,
|
|
struct ttm_buffer_object *,
|
|
struct ttm_mem_reg *, struct ttm_mem_reg *);
|
|
int (*init)(struct nouveau_channel *, u32 handle);
|
|
} _methods[] = {
|
|
{ "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
|
|
{ "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
|
|
{ "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
|
|
{ "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
|
|
{ "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
|
|
{ "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
|
|
{ "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
|
|
{ "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
|
|
{ "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
|
|
{},
|
|
{ "CRYPT", 0, 0x88b4, nv98_bo_move_exec, nv50_bo_move_init },
|
|
}, *mthd = _methods;
|
|
const char *name = "CPU";
|
|
int ret;
|
|
|
|
do {
|
|
struct nouveau_object *object;
|
|
struct nouveau_channel *chan;
|
|
u32 handle = (mthd->engine << 16) | mthd->oclass;
|
|
|
|
if (mthd->engine)
|
|
chan = drm->cechan;
|
|
else
|
|
chan = drm->channel;
|
|
if (chan == NULL)
|
|
continue;
|
|
|
|
ret = nouveau_object_new(nv_object(drm), chan->handle, handle,
|
|
mthd->oclass, NULL, 0, &object);
|
|
if (ret == 0) {
|
|
ret = mthd->init(chan, handle);
|
|
if (ret) {
|
|
nouveau_object_del(nv_object(drm),
|
|
chan->handle, handle);
|
|
continue;
|
|
}
|
|
|
|
drm->ttm.move = mthd->exec;
|
|
drm->ttm.chan = chan;
|
|
name = mthd->name;
|
|
break;
|
|
}
|
|
} while ((++mthd)->exec);
|
|
|
|
NV_INFO(drm, "MM: using %s for buffer copies\n", name);
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
|
|
bool no_wait_gpu, struct ttm_mem_reg *new_mem)
|
|
{
|
|
u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
|
|
struct ttm_placement placement;
|
|
struct ttm_mem_reg tmp_mem;
|
|
int ret;
|
|
|
|
placement.fpfn = placement.lpfn = 0;
|
|
placement.num_placement = placement.num_busy_placement = 1;
|
|
placement.placement = placement.busy_placement = &placement_memtype;
|
|
|
|
tmp_mem = *new_mem;
|
|
tmp_mem.mm_node = NULL;
|
|
ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_gpu);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ttm_tt_bind(bo->ttm, &tmp_mem);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, &tmp_mem);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, new_mem);
|
|
out:
|
|
ttm_bo_mem_put(bo, &tmp_mem);
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
|
|
bool no_wait_gpu, struct ttm_mem_reg *new_mem)
|
|
{
|
|
u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
|
|
struct ttm_placement placement;
|
|
struct ttm_mem_reg tmp_mem;
|
|
int ret;
|
|
|
|
placement.fpfn = placement.lpfn = 0;
|
|
placement.num_placement = placement.num_busy_placement = 1;
|
|
placement.placement = placement.busy_placement = &placement_memtype;
|
|
|
|
tmp_mem = *new_mem;
|
|
tmp_mem.mm_node = NULL;
|
|
ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_gpu);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ttm_bo_move_ttm(bo, true, no_wait_gpu, &tmp_mem);
|
|
if (ret)
|
|
goto out;
|
|
|
|
ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_gpu, new_mem);
|
|
if (ret)
|
|
goto out;
|
|
|
|
out:
|
|
ttm_bo_mem_put(bo, &tmp_mem);
|
|
return ret;
|
|
}
|
|
|
|
static void
|
|
nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
struct nouveau_vma *vma;
|
|
|
|
/* ttm can now (stupidly) pass the driver bos it didn't create... */
|
|
if (bo->destroy != nouveau_bo_del_ttm)
|
|
return;
|
|
|
|
list_for_each_entry(vma, &nvbo->vma_list, head) {
|
|
if (new_mem && new_mem->mem_type != TTM_PL_SYSTEM &&
|
|
(new_mem->mem_type == TTM_PL_VRAM ||
|
|
nvbo->page_shift != vma->vm->vmm->lpg_shift)) {
|
|
nouveau_vm_map(vma, new_mem->mm_node);
|
|
} else {
|
|
nouveau_vm_unmap(vma);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
|
|
struct nouveau_drm_tile **new_tile)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
|
|
struct drm_device *dev = drm->dev;
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
u64 offset = new_mem->start << PAGE_SHIFT;
|
|
|
|
*new_tile = NULL;
|
|
if (new_mem->mem_type != TTM_PL_VRAM)
|
|
return 0;
|
|
|
|
if (nv_device(drm->device)->card_type >= NV_10) {
|
|
*new_tile = nv10_bo_set_tiling(dev, offset, new_mem->size,
|
|
nvbo->tile_mode,
|
|
nvbo->tile_flags);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
|
|
struct nouveau_drm_tile *new_tile,
|
|
struct nouveau_drm_tile **old_tile)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
|
|
struct drm_device *dev = drm->dev;
|
|
|
|
nv10_bo_put_tile_region(dev, *old_tile, bo->sync_obj);
|
|
*old_tile = new_tile;
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
|
|
bool no_wait_gpu, struct ttm_mem_reg *new_mem)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
struct ttm_mem_reg *old_mem = &bo->mem;
|
|
struct nouveau_drm_tile *new_tile = NULL;
|
|
int ret = 0;
|
|
|
|
if (nv_device(drm->device)->card_type < NV_50) {
|
|
ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
/* Fake bo copy. */
|
|
if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
|
|
BUG_ON(bo->mem.mm_node != NULL);
|
|
bo->mem = *new_mem;
|
|
new_mem->mm_node = NULL;
|
|
goto out;
|
|
}
|
|
|
|
/* Hardware assisted copy. */
|
|
if (drm->ttm.move) {
|
|
if (new_mem->mem_type == TTM_PL_SYSTEM)
|
|
ret = nouveau_bo_move_flipd(bo, evict, intr,
|
|
no_wait_gpu, new_mem);
|
|
else if (old_mem->mem_type == TTM_PL_SYSTEM)
|
|
ret = nouveau_bo_move_flips(bo, evict, intr,
|
|
no_wait_gpu, new_mem);
|
|
else
|
|
ret = nouveau_bo_move_m2mf(bo, evict, intr,
|
|
no_wait_gpu, new_mem);
|
|
if (!ret)
|
|
goto out;
|
|
}
|
|
|
|
/* Fallback to software copy. */
|
|
spin_lock(&bo->bdev->fence_lock);
|
|
ret = ttm_bo_wait(bo, true, intr, no_wait_gpu);
|
|
spin_unlock(&bo->bdev->fence_lock);
|
|
if (ret == 0)
|
|
ret = ttm_bo_move_memcpy(bo, evict, no_wait_gpu, new_mem);
|
|
|
|
out:
|
|
if (nv_device(drm->device)->card_type < NV_50) {
|
|
if (ret)
|
|
nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
|
|
else
|
|
nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
|
|
{
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
|
|
return drm_vma_node_verify_access(&nvbo->gem.vma_node, filp);
|
|
}
|
|
|
|
static int
|
|
nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
|
|
{
|
|
struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
|
|
struct nouveau_drm *drm = nouveau_bdev(bdev);
|
|
struct nouveau_mem *node = mem->mm_node;
|
|
struct drm_device *dev = drm->dev;
|
|
int ret;
|
|
|
|
mem->bus.addr = NULL;
|
|
mem->bus.offset = 0;
|
|
mem->bus.size = mem->num_pages << PAGE_SHIFT;
|
|
mem->bus.base = 0;
|
|
mem->bus.is_iomem = false;
|
|
if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
|
|
return -EINVAL;
|
|
switch (mem->mem_type) {
|
|
case TTM_PL_SYSTEM:
|
|
/* System memory */
|
|
return 0;
|
|
case TTM_PL_TT:
|
|
#if __OS_HAS_AGP
|
|
if (drm->agp.stat == ENABLED) {
|
|
mem->bus.offset = mem->start << PAGE_SHIFT;
|
|
mem->bus.base = drm->agp.base;
|
|
mem->bus.is_iomem = !dev->agp->cant_use_aperture;
|
|
}
|
|
#endif
|
|
if (nv_device(drm->device)->card_type < NV_50 || !node->memtype)
|
|
/* untiled */
|
|
break;
|
|
/* fallthrough, tiled memory */
|
|
case TTM_PL_VRAM:
|
|
mem->bus.offset = mem->start << PAGE_SHIFT;
|
|
mem->bus.base = nv_device_resource_start(nouveau_dev(dev), 1);
|
|
mem->bus.is_iomem = true;
|
|
if (nv_device(drm->device)->card_type >= NV_50) {
|
|
struct nouveau_bar *bar = nouveau_bar(drm->device);
|
|
|
|
ret = bar->umap(bar, node, NV_MEM_ACCESS_RW,
|
|
&node->bar_vma);
|
|
if (ret)
|
|
return ret;
|
|
|
|
mem->bus.offset = node->bar_vma.offset;
|
|
}
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bdev);
|
|
struct nouveau_bar *bar = nouveau_bar(drm->device);
|
|
struct nouveau_mem *node = mem->mm_node;
|
|
|
|
if (!node->bar_vma.node)
|
|
return;
|
|
|
|
bar->unmap(bar, &node->bar_vma);
|
|
}
|
|
|
|
static int
|
|
nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
|
|
{
|
|
struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
|
|
struct nouveau_bo *nvbo = nouveau_bo(bo);
|
|
struct nouveau_device *device = nv_device(drm->device);
|
|
u32 mappable = nv_device_resource_len(device, 1) >> PAGE_SHIFT;
|
|
int ret;
|
|
|
|
/* as long as the bo isn't in vram, and isn't tiled, we've got
|
|
* nothing to do here.
|
|
*/
|
|
if (bo->mem.mem_type != TTM_PL_VRAM) {
|
|
if (nv_device(drm->device)->card_type < NV_50 ||
|
|
!nouveau_bo_tile_layout(nvbo))
|
|
return 0;
|
|
|
|
if (bo->mem.mem_type == TTM_PL_SYSTEM) {
|
|
nouveau_bo_placement_set(nvbo, TTM_PL_TT, 0);
|
|
|
|
ret = nouveau_bo_validate(nvbo, false, false);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* make sure bo is in mappable vram */
|
|
if (nv_device(drm->device)->card_type >= NV_50 ||
|
|
bo->mem.start + bo->mem.num_pages < mappable)
|
|
return 0;
|
|
|
|
|
|
nvbo->placement.fpfn = 0;
|
|
nvbo->placement.lpfn = mappable;
|
|
nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0);
|
|
return nouveau_bo_validate(nvbo, false, false);
|
|
}
|
|
|
|
static int
|
|
nouveau_ttm_tt_populate(struct ttm_tt *ttm)
|
|
{
|
|
struct ttm_dma_tt *ttm_dma = (void *)ttm;
|
|
struct nouveau_drm *drm;
|
|
struct nouveau_device *device;
|
|
struct drm_device *dev;
|
|
unsigned i;
|
|
int r;
|
|
bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
|
|
|
|
if (ttm->state != tt_unpopulated)
|
|
return 0;
|
|
|
|
if (slave && ttm->sg) {
|
|
/* make userspace faulting work */
|
|
drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
|
|
ttm_dma->dma_address, ttm->num_pages);
|
|
ttm->state = tt_unbound;
|
|
return 0;
|
|
}
|
|
|
|
drm = nouveau_bdev(ttm->bdev);
|
|
device = nv_device(drm->device);
|
|
dev = drm->dev;
|
|
|
|
#if __OS_HAS_AGP
|
|
if (drm->agp.stat == ENABLED) {
|
|
return ttm_agp_tt_populate(ttm);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SWIOTLB
|
|
if (swiotlb_nr_tbl()) {
|
|
return ttm_dma_populate((void *)ttm, dev->dev);
|
|
}
|
|
#endif
|
|
|
|
r = ttm_pool_populate(ttm);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
|
|
for (i = 0; i < ttm->num_pages; i++) {
|
|
ttm_dma->dma_address[i] = nv_device_map_page(device,
|
|
ttm->pages[i]);
|
|
if (!ttm_dma->dma_address[i]) {
|
|
while (--i) {
|
|
nv_device_unmap_page(device,
|
|
ttm_dma->dma_address[i]);
|
|
ttm_dma->dma_address[i] = 0;
|
|
}
|
|
ttm_pool_unpopulate(ttm);
|
|
return -EFAULT;
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
nouveau_ttm_tt_unpopulate(struct ttm_tt *ttm)
|
|
{
|
|
struct ttm_dma_tt *ttm_dma = (void *)ttm;
|
|
struct nouveau_drm *drm;
|
|
struct nouveau_device *device;
|
|
struct drm_device *dev;
|
|
unsigned i;
|
|
bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
|
|
|
|
if (slave)
|
|
return;
|
|
|
|
drm = nouveau_bdev(ttm->bdev);
|
|
device = nv_device(drm->device);
|
|
dev = drm->dev;
|
|
|
|
#if __OS_HAS_AGP
|
|
if (drm->agp.stat == ENABLED) {
|
|
ttm_agp_tt_unpopulate(ttm);
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SWIOTLB
|
|
if (swiotlb_nr_tbl()) {
|
|
ttm_dma_unpopulate((void *)ttm, dev->dev);
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
for (i = 0; i < ttm->num_pages; i++) {
|
|
if (ttm_dma->dma_address[i]) {
|
|
nv_device_unmap_page(device, ttm_dma->dma_address[i]);
|
|
}
|
|
}
|
|
|
|
ttm_pool_unpopulate(ttm);
|
|
}
|
|
|
|
void
|
|
nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
|
|
{
|
|
struct nouveau_fence *new_fence = nouveau_fence_ref(fence);
|
|
struct nouveau_fence *old_fence = NULL;
|
|
|
|
spin_lock(&nvbo->bo.bdev->fence_lock);
|
|
old_fence = nvbo->bo.sync_obj;
|
|
nvbo->bo.sync_obj = new_fence;
|
|
spin_unlock(&nvbo->bo.bdev->fence_lock);
|
|
|
|
nouveau_fence_unref(&old_fence);
|
|
}
|
|
|
|
static void
|
|
nouveau_bo_fence_unref(void **sync_obj)
|
|
{
|
|
nouveau_fence_unref((struct nouveau_fence **)sync_obj);
|
|
}
|
|
|
|
static void *
|
|
nouveau_bo_fence_ref(void *sync_obj)
|
|
{
|
|
return nouveau_fence_ref(sync_obj);
|
|
}
|
|
|
|
static bool
|
|
nouveau_bo_fence_signalled(void *sync_obj)
|
|
{
|
|
return nouveau_fence_done(sync_obj);
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_fence_wait(void *sync_obj, bool lazy, bool intr)
|
|
{
|
|
return nouveau_fence_wait(sync_obj, lazy, intr);
|
|
}
|
|
|
|
static int
|
|
nouveau_bo_fence_flush(void *sync_obj)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
struct ttm_bo_driver nouveau_bo_driver = {
|
|
.ttm_tt_create = &nouveau_ttm_tt_create,
|
|
.ttm_tt_populate = &nouveau_ttm_tt_populate,
|
|
.ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
|
|
.invalidate_caches = nouveau_bo_invalidate_caches,
|
|
.init_mem_type = nouveau_bo_init_mem_type,
|
|
.evict_flags = nouveau_bo_evict_flags,
|
|
.move_notify = nouveau_bo_move_ntfy,
|
|
.move = nouveau_bo_move,
|
|
.verify_access = nouveau_bo_verify_access,
|
|
.sync_obj_signaled = nouveau_bo_fence_signalled,
|
|
.sync_obj_wait = nouveau_bo_fence_wait,
|
|
.sync_obj_flush = nouveau_bo_fence_flush,
|
|
.sync_obj_unref = nouveau_bo_fence_unref,
|
|
.sync_obj_ref = nouveau_bo_fence_ref,
|
|
.fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
|
|
.io_mem_reserve = &nouveau_ttm_io_mem_reserve,
|
|
.io_mem_free = &nouveau_ttm_io_mem_free,
|
|
};
|
|
|
|
struct nouveau_vma *
|
|
nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
|
|
{
|
|
struct nouveau_vma *vma;
|
|
list_for_each_entry(vma, &nvbo->vma_list, head) {
|
|
if (vma->vm == vm)
|
|
return vma;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
int
|
|
nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
|
|
struct nouveau_vma *vma)
|
|
{
|
|
const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
|
|
int ret;
|
|
|
|
ret = nouveau_vm_get(vm, size, nvbo->page_shift,
|
|
NV_MEM_ACCESS_RW, vma);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if ( nvbo->bo.mem.mem_type != TTM_PL_SYSTEM &&
|
|
(nvbo->bo.mem.mem_type == TTM_PL_VRAM ||
|
|
nvbo->page_shift != vma->vm->vmm->lpg_shift))
|
|
nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
|
|
|
|
list_add_tail(&vma->head, &nvbo->vma_list);
|
|
vma->refcount = 1;
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
|
|
{
|
|
if (vma->node) {
|
|
if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM)
|
|
nouveau_vm_unmap(vma);
|
|
nouveau_vm_put(vma);
|
|
list_del(&vma->head);
|
|
}
|
|
}
|