mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 03:05:21 +07:00
7ec9f34a03
ARC Timers have historically been probed directly. As precursor to start probing Timers thru DT introduce these bindings Note that to keep series bisectable, these bindings are not yet used in code. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
52 lines
1.0 KiB
Plaintext
52 lines
1.0 KiB
Plaintext
/*
|
|
* Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
/*
|
|
* Skeleton device tree; the bare minimum needed to boot; just include and
|
|
* add a compatible value.
|
|
*/
|
|
|
|
/ {
|
|
compatible = "snps,arc";
|
|
clock-frequency = <80000000>; /* 80 MHZ */
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
chosen { };
|
|
aliases { };
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "snps,arc770d";
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
/* TIMER0 with interrupt for clockevent */
|
|
timer0 {
|
|
compatible = "snps,arc-timer";
|
|
interrupts = <3>;
|
|
interrupt-parent = <&core_intc>;
|
|
clocks = <&core_clk>;
|
|
};
|
|
|
|
/* TIMER1 for free running clocksource */
|
|
timer1 {
|
|
compatible = "snps,arc-timer";
|
|
clocks = <&core_clk>;
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x80000000 0x10000000>; /* 256M */
|
|
};
|
|
};
|