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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ef70728c7a
When tegra-drm.ko is built as a module, these MODULE_DEVICE_TABLEs allow the module to be auto-loaded since the module will match the devices instantiated from device tree. (Notes for stable: in 3.14+, just git rm any conflicting file, since they are added in later kernels. For 3.13 and below, manual merging will be needed) Cc: <stable@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
221 lines
4.8 KiB
C
221 lines
4.8 KiB
C
/*
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* Copyright (c) 2012-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include "drm.h"
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#include "gem.h"
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#include "gr2d.h"
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struct gr2d {
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struct tegra_drm_client client;
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struct host1x_channel *channel;
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struct clk *clk;
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DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
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};
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static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
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{
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return container_of(client, struct gr2d, client);
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}
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static int gr2d_init(struct host1x_client *client)
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{
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struct tegra_drm_client *drm = host1x_to_drm_client(client);
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struct drm_device *dev = dev_get_drvdata(client->parent);
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unsigned long flags = HOST1X_SYNCPT_HAS_BASE;
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struct gr2d *gr2d = to_gr2d(drm);
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gr2d->channel = host1x_channel_request(client->dev);
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if (!gr2d->channel)
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return -ENOMEM;
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client->syncpts[0] = host1x_syncpt_request(client->dev, flags);
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if (!client->syncpts[0]) {
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host1x_channel_free(gr2d->channel);
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return -ENOMEM;
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}
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return tegra_drm_register_client(dev->dev_private, drm);
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}
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static int gr2d_exit(struct host1x_client *client)
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{
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struct tegra_drm_client *drm = host1x_to_drm_client(client);
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struct drm_device *dev = dev_get_drvdata(client->parent);
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struct gr2d *gr2d = to_gr2d(drm);
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int err;
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err = tegra_drm_unregister_client(dev->dev_private, drm);
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if (err < 0)
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return err;
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host1x_syncpt_free(client->syncpts[0]);
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host1x_channel_free(gr2d->channel);
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return 0;
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}
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static const struct host1x_client_ops gr2d_client_ops = {
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.init = gr2d_init,
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.exit = gr2d_exit,
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};
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static int gr2d_open_channel(struct tegra_drm_client *client,
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struct tegra_drm_context *context)
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{
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struct gr2d *gr2d = to_gr2d(client);
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context->channel = host1x_channel_get(gr2d->channel);
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if (!context->channel)
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return -ENOMEM;
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return 0;
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}
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static void gr2d_close_channel(struct tegra_drm_context *context)
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{
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host1x_channel_put(context->channel);
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}
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static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
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{
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struct gr2d *gr2d = dev_get_drvdata(dev);
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switch (class) {
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case HOST1X_CLASS_HOST1X:
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if (offset == 0x2b)
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return 1;
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break;
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case HOST1X_CLASS_GR2D:
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case HOST1X_CLASS_GR2D_SB:
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if (offset >= GR2D_NUM_REGS)
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break;
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if (test_bit(offset, gr2d->addr_regs))
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return 1;
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break;
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}
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return 0;
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}
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static const struct tegra_drm_client_ops gr2d_ops = {
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.open_channel = gr2d_open_channel,
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.close_channel = gr2d_close_channel,
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.is_addr_reg = gr2d_is_addr_reg,
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.submit = tegra_drm_submit,
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};
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static const struct of_device_id gr2d_match[] = {
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{ .compatible = "nvidia,tegra30-gr2d" },
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{ .compatible = "nvidia,tegra20-gr2d" },
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{ },
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};
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MODULE_DEVICE_TABLE(of, gr2d_match);
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static const u32 gr2d_addr_regs[] = {
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GR2D_UA_BASE_ADDR,
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GR2D_VA_BASE_ADDR,
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GR2D_PAT_BASE_ADDR,
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GR2D_DSTA_BASE_ADDR,
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GR2D_DSTB_BASE_ADDR,
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GR2D_DSTC_BASE_ADDR,
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GR2D_SRCA_BASE_ADDR,
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GR2D_SRCB_BASE_ADDR,
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GR2D_SRC_BASE_ADDR_SB,
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GR2D_DSTA_BASE_ADDR_SB,
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GR2D_DSTB_BASE_ADDR_SB,
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GR2D_UA_BASE_ADDR_SB,
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GR2D_VA_BASE_ADDR_SB,
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};
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static int gr2d_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct host1x_syncpt **syncpts;
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struct gr2d *gr2d;
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unsigned int i;
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int err;
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gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
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if (!gr2d)
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return -ENOMEM;
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syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
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if (!syncpts)
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return -ENOMEM;
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gr2d->clk = devm_clk_get(dev, NULL);
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if (IS_ERR(gr2d->clk)) {
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dev_err(dev, "cannot get clock\n");
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return PTR_ERR(gr2d->clk);
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}
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err = clk_prepare_enable(gr2d->clk);
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if (err) {
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dev_err(dev, "cannot turn on clock\n");
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return err;
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}
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INIT_LIST_HEAD(&gr2d->client.base.list);
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gr2d->client.base.ops = &gr2d_client_ops;
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gr2d->client.base.dev = dev;
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gr2d->client.base.class = HOST1X_CLASS_GR2D;
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gr2d->client.base.syncpts = syncpts;
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gr2d->client.base.num_syncpts = 1;
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INIT_LIST_HEAD(&gr2d->client.list);
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gr2d->client.ops = &gr2d_ops;
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err = host1x_client_register(&gr2d->client.base);
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if (err < 0) {
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dev_err(dev, "failed to register host1x client: %d\n", err);
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clk_disable_unprepare(gr2d->clk);
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return err;
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}
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/* initialize address register map */
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for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
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set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
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platform_set_drvdata(pdev, gr2d);
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return 0;
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}
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static int gr2d_remove(struct platform_device *pdev)
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{
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struct gr2d *gr2d = platform_get_drvdata(pdev);
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int err;
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err = host1x_client_unregister(&gr2d->client.base);
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if (err < 0) {
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dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
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err);
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return err;
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}
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clk_disable_unprepare(gr2d->clk);
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return 0;
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}
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struct platform_driver tegra_gr2d_driver = {
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.driver = {
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.name = "tegra-gr2d",
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.of_match_table = gr2d_match,
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},
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.probe = gr2d_probe,
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.remove = gr2d_remove,
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};
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