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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
118 lines
2.4 KiB
C
118 lines
2.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Author: Xianghua Xiao <x.xiao@freescale.com>
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* Zhang Wei <wei.zhang@freescale.com>
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*
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* Copyright 2006 Freescale Semiconductor Inc.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <asm/code-patching.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/pci-bridge.h>
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#include <asm/mpic.h>
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#include <asm/cacheflush.h>
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#include <sysdev/fsl_soc.h>
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#include "mpc86xx.h"
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extern void __secondary_start_mpc86xx(void);
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#define MCM_PORT_CONFIG_OFFSET 0x10
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/* Offset from CCSRBAR */
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#define MPC86xx_MCM_OFFSET (0x1000)
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#define MPC86xx_MCM_SIZE (0x1000)
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static void __init
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smp_86xx_release_core(int nr)
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{
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__be32 __iomem *mcm_vaddr;
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unsigned long pcr;
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if (nr < 0 || nr >= NR_CPUS)
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return;
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/*
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* Startup Core #nr.
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*/
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mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
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MPC86xx_MCM_SIZE);
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pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
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pcr |= 1 << (nr + 24);
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out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
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iounmap(mcm_vaddr);
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}
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static int __init
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smp_86xx_kick_cpu(int nr)
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{
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unsigned int save_vector;
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unsigned long target, flags;
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int n = 0;
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unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
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if (nr < 0 || nr >= NR_CPUS)
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return -ENOENT;
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pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
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local_irq_save(flags);
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/* Save reset vector */
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save_vector = *vector;
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/* Setup fake reset vector to call __secondary_start_mpc86xx. */
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target = (unsigned long) __secondary_start_mpc86xx;
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patch_branch(vector, target, BRANCH_SET_LINK);
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/* Kick that CPU */
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smp_86xx_release_core(nr);
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/* Wait a bit for the CPU to take the exception. */
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while ((__secondary_hold_acknowledge != nr) && (n++, n < 1000))
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mdelay(1);
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/* Restore the exception vector */
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patch_instruction(vector, save_vector);
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local_irq_restore(flags);
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pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
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return 0;
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}
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static void __init
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smp_86xx_setup_cpu(int cpu_nr)
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{
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mpic_setup_this_cpu();
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}
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struct smp_ops_t smp_86xx_ops = {
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.cause_nmi_ipi = NULL,
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.message_pass = smp_mpic_message_pass,
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.probe = smp_mpic_probe,
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.kick_cpu = smp_86xx_kick_cpu,
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.setup_cpu = smp_86xx_setup_cpu,
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.take_timebase = smp_generic_take_timebase,
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.give_timebase = smp_generic_give_timebase,
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};
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void __init
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mpc86xx_smp_init(void)
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{
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smp_ops = &smp_86xx_ops;
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}
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