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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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2b10906f2d
force_iret() was originally intended to prevent the return to user mode with the SYSRET or SYSEXIT instructions, in cases where the register state could have been changed to be incompatible with those instructions. The entry code has been significantly reworked since then, and register state is validated before SYSRET or SYSEXIT are used. force_iret() no longer serves its original purpose and can be eliminated. Signed-off-by: Brian Gerst <brgerst@gmail.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Oleg Nesterov <oleg@redhat.com> Link: https://lkml.kernel.org/r/20191219115812.102620-1-brgerst@gmail.com
250 lines
8.3 KiB
C
250 lines
8.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* thread_info.h: low-level thread information
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*
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* Copyright (C) 2002 David Howells (dhowells@redhat.com)
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* - Incorporating suggestions made by Linus Torvalds and Dave Miller
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*/
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#ifndef _ASM_X86_THREAD_INFO_H
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#define _ASM_X86_THREAD_INFO_H
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#include <linux/compiler.h>
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#include <asm/page.h>
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#include <asm/percpu.h>
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#include <asm/types.h>
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/*
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* TOP_OF_KERNEL_STACK_PADDING is a number of unused bytes that we
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* reserve at the top of the kernel stack. We do it because of a nasty
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* 32-bit corner case. On x86_32, the hardware stack frame is
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* variable-length. Except for vm86 mode, struct pt_regs assumes a
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* maximum-length frame. If we enter from CPL 0, the top 8 bytes of
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* pt_regs don't actually exist. Ordinarily this doesn't matter, but it
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* does in at least one case:
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*
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* If we take an NMI early enough in SYSENTER, then we can end up with
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* pt_regs that extends above sp0. On the way out, in the espfix code,
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* we can read the saved SS value, but that value will be above sp0.
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* Without this offset, that can result in a page fault. (We are
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* careful that, in this case, the value we read doesn't matter.)
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*
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* In vm86 mode, the hardware frame is much longer still, so add 16
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* bytes to make room for the real-mode segments.
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*
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* x86_64 has a fixed-length stack frame.
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*/
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#ifdef CONFIG_X86_32
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# ifdef CONFIG_VM86
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# define TOP_OF_KERNEL_STACK_PADDING 16
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# else
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# define TOP_OF_KERNEL_STACK_PADDING 8
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# endif
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#else
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# define TOP_OF_KERNEL_STACK_PADDING 0
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#endif
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/*
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* low level task data that entry.S needs immediate access to
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* - this struct should fit entirely inside of one cache line
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* - this struct shares the supervisor stack pages
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*/
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#ifndef __ASSEMBLY__
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struct task_struct;
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#include <asm/cpufeature.h>
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#include <linux/atomic.h>
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struct thread_info {
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unsigned long flags; /* low level flags */
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u32 status; /* thread synchronous flags */
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};
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#define INIT_THREAD_INFO(tsk) \
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{ \
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.flags = 0, \
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}
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#else /* !__ASSEMBLY__ */
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#include <asm/asm-offsets.h>
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#endif
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/*
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* thread information flags
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* - these are process state flags that various assembly files
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* may need to access
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*/
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#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
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#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
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#define TIF_SIGPENDING 2 /* signal pending */
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#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
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#define TIF_SINGLESTEP 4 /* reenable singlestep on user return*/
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#define TIF_SSBD 5 /* Speculative store bypass disable */
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#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
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#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
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#define TIF_SECCOMP 8 /* secure computing */
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#define TIF_SPEC_IB 9 /* Indirect branch speculation mitigation */
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#define TIF_SPEC_FORCE_UPDATE 10 /* Force speculation MSR update in context switch */
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#define TIF_USER_RETURN_NOTIFY 11 /* notify kernel of userspace return */
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#define TIF_UPROBE 12 /* breakpointed or singlestepping */
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#define TIF_PATCH_PENDING 13 /* pending live patching update */
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#define TIF_NEED_FPU_LOAD 14 /* load FPU on return to userspace */
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#define TIF_NOCPUID 15 /* CPUID is not accessible in userland */
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#define TIF_NOTSC 16 /* TSC is not accessible in userland */
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#define TIF_IA32 17 /* IA32 compatibility process */
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#define TIF_NOHZ 19 /* in adaptive nohz mode */
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#define TIF_MEMDIE 20 /* is terminating due to OOM killer */
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#define TIF_POLLING_NRFLAG 21 /* idle is polling for TIF_NEED_RESCHED */
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#define TIF_IO_BITMAP 22 /* uses I/O bitmap */
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#define TIF_FORCED_TF 24 /* true if TF in eflags artificially */
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#define TIF_BLOCKSTEP 25 /* set when we want DEBUGCTLMSR_BTF */
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#define TIF_LAZY_MMU_UPDATES 27 /* task is updating the mmu lazily */
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#define TIF_SYSCALL_TRACEPOINT 28 /* syscall tracepoint instrumentation */
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#define TIF_ADDR32 29 /* 32-bit address space on 64 bits */
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#define TIF_X32 30 /* 32-bit native x86-64 binary */
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#define TIF_FSCHECK 31 /* Check FS is USER_DS on return */
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#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
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#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
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#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
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#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
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#define _TIF_SSBD (1 << TIF_SSBD)
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#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU)
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#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
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#define _TIF_SECCOMP (1 << TIF_SECCOMP)
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#define _TIF_SPEC_IB (1 << TIF_SPEC_IB)
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#define _TIF_SPEC_FORCE_UPDATE (1 << TIF_SPEC_FORCE_UPDATE)
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#define _TIF_USER_RETURN_NOTIFY (1 << TIF_USER_RETURN_NOTIFY)
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#define _TIF_UPROBE (1 << TIF_UPROBE)
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#define _TIF_PATCH_PENDING (1 << TIF_PATCH_PENDING)
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#define _TIF_NEED_FPU_LOAD (1 << TIF_NEED_FPU_LOAD)
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#define _TIF_NOCPUID (1 << TIF_NOCPUID)
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#define _TIF_NOTSC (1 << TIF_NOTSC)
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#define _TIF_IA32 (1 << TIF_IA32)
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#define _TIF_NOHZ (1 << TIF_NOHZ)
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#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
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#define _TIF_IO_BITMAP (1 << TIF_IO_BITMAP)
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#define _TIF_FORCED_TF (1 << TIF_FORCED_TF)
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#define _TIF_BLOCKSTEP (1 << TIF_BLOCKSTEP)
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#define _TIF_LAZY_MMU_UPDATES (1 << TIF_LAZY_MMU_UPDATES)
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#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT)
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#define _TIF_ADDR32 (1 << TIF_ADDR32)
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#define _TIF_X32 (1 << TIF_X32)
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#define _TIF_FSCHECK (1 << TIF_FSCHECK)
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/*
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* work to do in syscall_trace_enter(). Also includes TIF_NOHZ for
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* enter_from_user_mode()
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*/
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#define _TIF_WORK_SYSCALL_ENTRY \
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(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU | _TIF_SYSCALL_AUDIT | \
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_TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT | \
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_TIF_NOHZ)
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/* flags to check in __switch_to() */
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#define _TIF_WORK_CTXSW_BASE \
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(_TIF_NOCPUID | _TIF_NOTSC | _TIF_BLOCKSTEP | \
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_TIF_SSBD | _TIF_SPEC_FORCE_UPDATE)
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/*
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* Avoid calls to __switch_to_xtra() on UP as STIBP is not evaluated.
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*/
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#ifdef CONFIG_SMP
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# define _TIF_WORK_CTXSW (_TIF_WORK_CTXSW_BASE | _TIF_SPEC_IB)
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#else
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# define _TIF_WORK_CTXSW (_TIF_WORK_CTXSW_BASE)
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#endif
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#ifdef CONFIG_X86_IOPL_IOPERM
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# define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY | \
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_TIF_IO_BITMAP)
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#else
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# define _TIF_WORK_CTXSW_PREV (_TIF_WORK_CTXSW| _TIF_USER_RETURN_NOTIFY)
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#endif
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#define _TIF_WORK_CTXSW_NEXT (_TIF_WORK_CTXSW)
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#define STACK_WARN (THREAD_SIZE/8)
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/*
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* macros/functions for gaining access to the thread information structure
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*
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* preempt_count needs to be 1 initially, until the scheduler is functional.
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*/
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#ifndef __ASSEMBLY__
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/*
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* Walks up the stack frames to make sure that the specified object is
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* entirely contained by a single stack frame.
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*
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* Returns:
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* GOOD_FRAME if within a frame
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* BAD_STACK if placed across a frame boundary (or outside stack)
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* NOT_STACK unable to determine (no frame pointers, etc)
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*/
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static inline int arch_within_stack_frames(const void * const stack,
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const void * const stackend,
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const void *obj, unsigned long len)
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{
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#if defined(CONFIG_FRAME_POINTER)
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const void *frame = NULL;
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const void *oldframe;
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oldframe = __builtin_frame_address(1);
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if (oldframe)
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frame = __builtin_frame_address(2);
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/*
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* low ----------------------------------------------> high
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* [saved bp][saved ip][args][local vars][saved bp][saved ip]
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* ^----------------^
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* allow copies only within here
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*/
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while (stack <= frame && frame < stackend) {
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/*
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* If obj + len extends past the last frame, this
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* check won't pass and the next frame will be 0,
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* causing us to bail out and correctly report
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* the copy as invalid.
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*/
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if (obj + len <= frame)
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return obj >= oldframe + 2 * sizeof(void *) ?
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GOOD_FRAME : BAD_STACK;
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oldframe = frame;
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frame = *(const void * const *)frame;
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}
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return BAD_STACK;
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#else
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return NOT_STACK;
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#endif
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}
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#else /* !__ASSEMBLY__ */
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#ifdef CONFIG_X86_64
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# define cpu_current_top_of_stack (cpu_tss_rw + TSS_sp1)
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#endif
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#endif
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#ifdef CONFIG_COMPAT
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#define TS_I386_REGS_POKED 0x0004 /* regs poked by 32-bit ptracer */
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#endif
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_X86_32
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#define in_ia32_syscall() true
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#else
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#define in_ia32_syscall() (IS_ENABLED(CONFIG_IA32_EMULATION) && \
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current_thread_info()->status & TS_COMPAT)
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#endif
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extern void arch_task_cache_init(void);
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extern int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
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extern void arch_release_task_struct(struct task_struct *tsk);
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extern void arch_setup_new_exec(void);
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#define arch_setup_new_exec arch_setup_new_exec
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#endif /* !__ASSEMBLY__ */
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#endif /* _ASM_X86_THREAD_INFO_H */
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