mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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e041013ac0
Initial board support for the GE IMP3A, a 3U compactPCI card with a p2020 processor. Signed-off-by: Martyn Welch <martyn.welch@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
200 lines
5.2 KiB
C
200 lines
5.2 KiB
C
/*
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* Driver for GE FPGA based GPIO
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*
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* Author: Martyn Welch <martyn.welch@ge.com>
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*
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* 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/* TODO
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*
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* Configuration of output modes (totem-pole/open-drain)
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* Interrupt configuration - interrupts are always generated the FPGA relies on
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* the I/O interrupt controllers mask to stop them propergating
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*/
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#include <linux/kernel.h>
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#include <linux/compiler.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/of_gpio.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#define GEF_GPIO_DIRECT 0x00
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#define GEF_GPIO_IN 0x04
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#define GEF_GPIO_OUT 0x08
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#define GEF_GPIO_TRIG 0x0C
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#define GEF_GPIO_POLAR_A 0x10
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#define GEF_GPIO_POLAR_B 0x14
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#define GEF_GPIO_INT_STAT 0x18
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#define GEF_GPIO_OVERRUN 0x1C
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#define GEF_GPIO_MODE 0x20
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static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
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{
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unsigned int data;
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data = ioread32be(reg);
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/* value: 0=low; 1=high */
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if (value & 0x1)
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data = data | (0x1 << offset);
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else
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data = data & ~(0x1 << offset);
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iowrite32be(data, reg);
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}
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static int gef_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
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{
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unsigned int data;
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struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
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data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
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data = data | (0x1 << offset);
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iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
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return 0;
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}
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static int gef_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
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{
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unsigned int data;
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struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
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/* Set direction before switching to input */
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_gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
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data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
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data = data & ~(0x1 << offset);
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iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
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return 0;
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}
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static int gef_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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unsigned int data;
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int state = 0;
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struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
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data = ioread32be(mmchip->regs + GEF_GPIO_IN);
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state = (int)((data >> offset) & 0x1);
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return state;
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}
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static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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{
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struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
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_gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
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}
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static int __init gef_gpio_init(void)
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{
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struct device_node *np;
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int retval;
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struct of_mm_gpio_chip *gef_gpio_chip;
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for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
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pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
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/* Allocate chip structure */
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gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
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if (!gef_gpio_chip) {
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pr_err("%s: Unable to allocate structure\n",
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np->full_name);
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continue;
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}
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/* Setup pointers to chip functions */
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gef_gpio_chip->gc.of_gpio_n_cells = 2;
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gef_gpio_chip->gc.ngpio = 19;
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gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
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gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
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gef_gpio_chip->gc.get = gef_gpio_get;
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gef_gpio_chip->gc.set = gef_gpio_set;
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/* This function adds a memory mapped GPIO chip */
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retval = of_mm_gpiochip_add(np, gef_gpio_chip);
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if (retval) {
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kfree(gef_gpio_chip);
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pr_err("%s: Unable to add GPIO\n", np->full_name);
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}
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}
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for_each_compatible_node(np, NULL, "gef,sbc310-gpio") {
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pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
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/* Allocate chip structure */
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gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
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if (!gef_gpio_chip) {
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pr_err("%s: Unable to allocate structure\n",
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np->full_name);
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continue;
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}
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/* Setup pointers to chip functions */
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gef_gpio_chip->gc.of_gpio_n_cells = 2;
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gef_gpio_chip->gc.ngpio = 6;
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gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
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gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
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gef_gpio_chip->gc.get = gef_gpio_get;
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gef_gpio_chip->gc.set = gef_gpio_set;
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/* This function adds a memory mapped GPIO chip */
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retval = of_mm_gpiochip_add(np, gef_gpio_chip);
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if (retval) {
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kfree(gef_gpio_chip);
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pr_err("%s: Unable to add GPIO\n", np->full_name);
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}
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}
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for_each_compatible_node(np, NULL, "ge,imp3a-gpio") {
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pr_debug("%s: Initialising GE GPIO\n", np->full_name);
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/* Allocate chip structure */
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gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
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if (!gef_gpio_chip) {
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pr_err("%s: Unable to allocate structure\n",
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np->full_name);
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continue;
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}
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/* Setup pointers to chip functions */
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gef_gpio_chip->gc.of_gpio_n_cells = 2;
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gef_gpio_chip->gc.ngpio = 16;
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gef_gpio_chip->gc.direction_input = gef_gpio_dir_in;
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gef_gpio_chip->gc.direction_output = gef_gpio_dir_out;
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gef_gpio_chip->gc.get = gef_gpio_get;
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gef_gpio_chip->gc.set = gef_gpio_set;
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/* This function adds a memory mapped GPIO chip */
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retval = of_mm_gpiochip_add(np, gef_gpio_chip);
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if (retval) {
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kfree(gef_gpio_chip);
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pr_err("%s: Unable to add GPIO\n", np->full_name);
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}
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}
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return 0;
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};
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arch_initcall(gef_gpio_init);
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MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
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MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
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MODULE_LICENSE("GPL");
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