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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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60f91268ee
* kzm9g-reference: Enable CMT1 in device tree * Use SoC-specific timer compat strings -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUEPAEAAoJENfPZGlqN0++GX0P/in7JxaEeSH1f1PRV6mWSJAH C9hEx7nlD0DfWttuZ+viurKL7GNdLiASXXb3188KmxY4SDUnG77o1qChhzyFXP6Z 2FyCwSafunI+6pVB+zuPzRQRtn52qZOvU0sANPvwh6Cz3GUtUqw2ojxXo/gPo393 020938zFzaghhDYN2OpV2I+IC6yAgUycwEZCHFNMLoTJh95FQhbwbJBs7zIbYovE 8RpTdj2Y3uQe1ATf/WDWGfVuwfRiHgIQJmqkaQmCfIAZiQ0xH6qUCGUza+Pz4l8z 9t9zBpPuaaIppg73+fga9UuI6BTCxzwz2Wv3NnAnbIsVPrQCx1hVnz6DPYjXwphK fENryV8I16xkniceQYLvalpeRK/btGeUEhuB+pvsuhE/+IECfOmYKgm4lXG8wB4h P0v1zMVy2OSNMI6uSDVoKLEH2U6i9J9ow4jarXkBvbG8Duk6CbUXKGNud9RnEswK Z6e7fRTh80puhh8TCo5f+9CbtVS47fCA62gy/L3bMQxddlt3XR5KJ5IIDASwaCcM mjFvOrXF4kMcegyYhVGcqYwG8CdSm+4Ymeevfk4F2KaxIZ4Wh69/J2dCTsiLYJvJ VRIGfEpjO8aqN1lY1A4j+y89byn0O03I7XuMUSmESyz+19HvC/EvGZpR3hggBLrD +TFSXHvGA7RbNik+ilLY =SogR -----END PGP SIGNATURE----- Merge tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Second Round of Renesas ARM Based SoC DT Timers Updates for v3.18" from Simon Horman: * kzm9g-reference: Enable CMT1 in device tree * Use SoC-specific timer compat strings Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-dt-timers2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: kzm9g-reference: Enable CMT1 in device tree ARM: shmobile: sh73a0: Add CMT1 device to DT ARM: shmobile: r8a7740: Use SoC-specific 48-bit CMT compat string ARM: shmobile: r8a7779: Use SoC-specific TMU compat string ARM: shmobile: r8a7791: Use SoC-specific 48-bit CMT compat string ARM: shmobile: r7s72100: Use SoC-specific MTU2 compat string ARM: shmobile: r8a7790: Use SoC-specific 48-bit CMT compat string
348 lines
8.9 KiB
Plaintext
348 lines
8.9 KiB
Plaintext
/*
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* Device Tree Source for the SH73A0 SoC
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "renesas,sh73a0";
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <0>;
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clock-frequency = <1196000000>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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reg = <1>;
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clock-frequency = <1196000000>;
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};
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};
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gic: interrupt-controller@f0001000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0xf0001000 0x1000>,
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<0xf0000100 0x100>;
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};
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pmu {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
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<0 56 IRQ_TYPE_LEVEL_HIGH>;
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};
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cmt1: timer@e6138000 {
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compatible = "renesas,cmt-48-sh73a0", "renesas,cmt-48";
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reg = <0xe6138000 0x200>;
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interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
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renesas,channels-mask = <0x3f>;
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status = "disabled";
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};
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irqpin0: irqpin@e6900000 {
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compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900000 4>,
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<0xe6900010 4>,
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<0xe6900020 1>,
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<0xe6900040 1>,
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<0xe6900060 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
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0 2 IRQ_TYPE_LEVEL_HIGH
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0 3 IRQ_TYPE_LEVEL_HIGH
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0 4 IRQ_TYPE_LEVEL_HIGH
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0 5 IRQ_TYPE_LEVEL_HIGH
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0 6 IRQ_TYPE_LEVEL_HIGH
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0 7 IRQ_TYPE_LEVEL_HIGH
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0 8 IRQ_TYPE_LEVEL_HIGH>;
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};
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irqpin1: irqpin@e6900004 {
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compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900004 4>,
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<0xe6900014 4>,
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<0xe6900024 1>,
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<0xe6900044 1>,
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<0xe6900064 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
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0 10 IRQ_TYPE_LEVEL_HIGH
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0 11 IRQ_TYPE_LEVEL_HIGH
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0 12 IRQ_TYPE_LEVEL_HIGH
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0 13 IRQ_TYPE_LEVEL_HIGH
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0 14 IRQ_TYPE_LEVEL_HIGH
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0 15 IRQ_TYPE_LEVEL_HIGH
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0 16 IRQ_TYPE_LEVEL_HIGH>;
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control-parent;
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};
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irqpin2: irqpin@e6900008 {
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compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe6900008 4>,
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<0xe6900018 4>,
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<0xe6900028 1>,
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<0xe6900048 1>,
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<0xe6900068 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
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0 18 IRQ_TYPE_LEVEL_HIGH
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0 19 IRQ_TYPE_LEVEL_HIGH
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0 20 IRQ_TYPE_LEVEL_HIGH
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0 21 IRQ_TYPE_LEVEL_HIGH
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0 22 IRQ_TYPE_LEVEL_HIGH
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0 23 IRQ_TYPE_LEVEL_HIGH
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0 24 IRQ_TYPE_LEVEL_HIGH>;
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};
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irqpin3: irqpin@e690000c {
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compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe690000c 4>,
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<0xe690001c 4>,
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<0xe690002c 1>,
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<0xe690004c 1>,
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<0xe690006c 1>;
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interrupt-parent = <&gic>;
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interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
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0 26 IRQ_TYPE_LEVEL_HIGH
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0 27 IRQ_TYPE_LEVEL_HIGH
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0 28 IRQ_TYPE_LEVEL_HIGH
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0 29 IRQ_TYPE_LEVEL_HIGH
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0 30 IRQ_TYPE_LEVEL_HIGH
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0 31 IRQ_TYPE_LEVEL_HIGH
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0 32 IRQ_TYPE_LEVEL_HIGH>;
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};
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i2c0: i2c@e6820000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6820000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
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0 168 IRQ_TYPE_LEVEL_HIGH
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0 169 IRQ_TYPE_LEVEL_HIGH
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0 170 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c1: i2c@e6822000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6822000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
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0 52 IRQ_TYPE_LEVEL_HIGH
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0 53 IRQ_TYPE_LEVEL_HIGH
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0 54 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c2: i2c@e6824000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6824000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
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0 172 IRQ_TYPE_LEVEL_HIGH
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0 173 IRQ_TYPE_LEVEL_HIGH
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0 174 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c3: i2c@e6826000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6826000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
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0 184 IRQ_TYPE_LEVEL_HIGH
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0 185 IRQ_TYPE_LEVEL_HIGH
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0 186 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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i2c4: i2c@e6828000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,rmobile-iic";
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reg = <0xe6828000 0x425>;
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interrupt-parent = <&gic>;
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interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
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0 188 IRQ_TYPE_LEVEL_HIGH
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0 189 IRQ_TYPE_LEVEL_HIGH
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0 190 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmcif: mmc@e6bd0000 {
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compatible = "renesas,sh-mmcif";
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reg = <0xe6bd0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
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0 141 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <4>;
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status = "disabled";
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};
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sdhi0: sd@ee100000 {
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compatible = "renesas,sdhi-sh73a0";
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reg = <0xee100000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
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0 84 IRQ_TYPE_LEVEL_HIGH
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0 85 IRQ_TYPE_LEVEL_HIGH>;
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cap-sd-highspeed;
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status = "disabled";
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};
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/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
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sdhi1: sd@ee120000 {
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compatible = "renesas,sdhi-sh73a0";
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reg = <0xee120000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
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0 89 IRQ_TYPE_LEVEL_HIGH>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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};
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sdhi2: sd@ee140000 {
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compatible = "renesas,sdhi-sh73a0";
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reg = <0xee140000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
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0 105 IRQ_TYPE_LEVEL_HIGH>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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};
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scifa0: serial@e6c40000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c40000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa1: serial@e6c50000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c50000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa2: serial@e6c60000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c60000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa3: serial@e6c70000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c70000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa4: serial@e6c80000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c80000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa5: serial@e6cb0000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cb0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa6: serial@e6cc0000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cc0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifa7: serial@e6cd0000 {
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cd0000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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scifb8: serial@e6c30000 {
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compatible = "renesas,scifb-sh73a0", "renesas,scifb";
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reg = <0xe6c30000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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pfc: pfc@e6050000 {
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compatible = "renesas,pfc-sh73a0";
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reg = <0xe6050000 0x8000>,
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<0xe605801c 0x1c>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts-extended =
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<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
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<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
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<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
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<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
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<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
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<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
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<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
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<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
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};
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sh_fsi2: sound@ec230000 {
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#sound-dai-cells = <1>;
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compatible = "renesas,sh_fsi2";
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reg = <0xec230000 0x400>;
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interrupt-parent = <&gic>;
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interrupts = <0 146 0x4>;
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status = "disabled";
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};
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};
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