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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
118 lines
2.7 KiB
C
118 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/unicore32/kernel/fpu-ucf64.c
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*
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* Code specific to PKUnity SoC and UniCore ISA
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*
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* Copyright (C) 2001-2010 GUAN Xue-tao
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/signal.h>
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#include <linux/sched/signal.h>
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#include <linux/init.h>
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#include <asm/fpu-ucf64.h>
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/*
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* A special flag to tell the normalisation code not to normalise.
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*/
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#define F64_NAN_FLAG 0x100
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/*
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* A bit pattern used to indicate the initial (unset) value of the
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* exception mask, in case nothing handles an instruction. This
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* doesn't include the NAN flag, which get masked out before
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* we check for an error.
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*/
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#define F64_EXCEPTION_ERROR ((u32)-1 & ~F64_NAN_FLAG)
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/*
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* Since we aren't building with -mfpu=f64, we need to code
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* these instructions using their MRC/MCR equivalents.
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*/
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#define f64reg(_f64_) #_f64_
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#define cff(_f64_) ({ \
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u32 __v; \
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asm("cff %0, " f64reg(_f64_) "@ fmrx %0, " #_f64_ \
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: "=r" (__v) : : "cc"); \
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__v; \
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})
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#define ctf(_f64_, _var_) \
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asm("ctf %0, " f64reg(_f64_) "@ fmxr " #_f64_ ", %0" \
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: : "r" (_var_) : "cc")
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/*
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* Raise a SIGFPE for the current process.
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* sicode describes the signal being raised.
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*/
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void ucf64_raise_sigfpe(struct pt_regs *regs)
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{
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/*
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* This is the same as NWFPE, because it's not clear what
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* this is used for
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*/
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current->thread.error_code = 0;
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current->thread.trap_no = 6;
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send_sig_fault(SIGFPE, FPE_FLTUNK,
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(void __user *)(instruction_pointer(regs) - 4),
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current);
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}
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/*
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* Handle exceptions of UniCore-F64.
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*/
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void ucf64_exchandler(u32 inst, u32 fpexc, struct pt_regs *regs)
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{
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u32 tmp = fpexc;
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u32 exc = F64_EXCEPTION_ERROR & fpexc;
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pr_debug("UniCore-F64: instruction %08x fpscr %08x\n",
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inst, fpexc);
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if (exc & FPSCR_CMPINSTR_BIT) {
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if (exc & FPSCR_CON)
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tmp |= FPSCR_CON;
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else
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tmp &= ~(FPSCR_CON);
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exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON);
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} else {
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pr_debug("UniCore-F64 Error: unhandled exceptions\n");
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pr_debug("UniCore-F64 FPSCR 0x%08x INST 0x%08x\n",
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cff(FPSCR), inst);
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ucf64_raise_sigfpe(regs);
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return;
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}
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/*
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* Update the FPSCR with the additional exception flags.
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* Comparison instructions always return at least one of
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* these flags set.
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*/
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tmp &= ~(FPSCR_TRAP | FPSCR_IOS | FPSCR_OFS | FPSCR_UFS |
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FPSCR_IXS | FPSCR_HIS | FPSCR_IOC | FPSCR_OFC |
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FPSCR_UFC | FPSCR_IXC | FPSCR_HIC);
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tmp |= exc;
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ctf(FPSCR, tmp);
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}
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/*
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* F64 support code initialisation.
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*/
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static int __init ucf64_init(void)
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{
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ctf(FPSCR, 0x0); /* FPSCR_UFE | FPSCR_NDE perhaps better */
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printk(KERN_INFO "Enable UniCore-F64 support.\n");
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return 0;
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}
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late_initcall(ucf64_init);
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