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804a5dd6ed
NXP LPC18xx/43xx SoCs are very similar devices and should be able to share a common base (lpc18xx.dtsi). Diffences between the devices are put in a dtsi which is specific to that device. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
115 lines
2.2 KiB
Plaintext
115 lines
2.2 KiB
Plaintext
/*
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* Common base for NXP LPC18xx and LPC43xx devices.
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*
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* Copyright 2015 Joachim Eastwood <manabian@gmail.com>
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*
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* This code is released using a dual license strategy: BSD/GPL
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* You can choose the licence that better fits your requirements.
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*
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* Released under the terms of 3-clause BSD License
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* Released under the terms of GNU General Public License Version 2.0
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*
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*/
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#include "armv7-m.dtsi"
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/ {
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-m3";
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device_type = "cpu";
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reg = <0x0>;
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};
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};
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clocks {
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xtal: xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <12000000>;
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};
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/* Temporary hardcode PLL1 until clk drivers are merged */
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pll1: pll1 {
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compatible = "fixed-factor-clock";
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clocks = <&xtal>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <12>;
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};
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};
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soc {
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uart0: serial@40081000 {
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compatible = "ns16550a";
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reg = <0x40081000 0x1000>;
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reg-shift = <2>;
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interrupts = <24>;
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clocks = <&pll1>;
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status = "disabled";
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};
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uart1: serial@40082000 {
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compatible = "ns16550a";
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reg = <0x40082000 0x1000>;
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reg-shift = <2>;
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interrupts = <25>;
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clocks = <&pll1>;
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status = "disabled";
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};
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timer0: timer@40084000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40084000 0x1000>;
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interrupts = <12>;
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clocks = <&pll1>;
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clock-names = "timerclk";
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};
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timer1: timer@40085000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x40085000 0x1000>;
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interrupts = <13>;
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clocks = <&pll1>;
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clock-names = "timerclk";
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};
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uart2: serial@400c1000 {
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compatible = "ns16550a";
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reg = <0x400c1000 0x1000>;
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reg-shift = <2>;
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interrupts = <26>;
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clocks = <&pll1>;
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status = "disabled";
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};
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uart3: serial@400c2000 {
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compatible = "ns16550a";
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reg = <0x400c2000 0x1000>;
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reg-shift = <2>;
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interrupts = <27>;
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clocks = <&pll1>;
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status = "disabled";
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};
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timer2: timer@400c3000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x400c3000 0x1000>;
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interrupts = <14>;
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clocks = <&pll1>;
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clock-names = "timerclk";
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};
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timer3: timer@400c4000 {
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compatible = "nxp,lpc3220-timer";
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reg = <0x400c4000 0x1000>;
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interrupts = <15>;
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clocks = <&pll1>;
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clock-names = "timerclk";
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};
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};
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};
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