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2d49d89c73
C6x needs almost no cache flushing routines of its own. Rely on asm-generic/cacheflush.h for the defaults. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Acked-by: Mark Salter <msalter@redhat.com> Cc: Aurelien Jacquiot <jacquiot.aurelien@gmail.com> Link: http://lkml.kernel.org/r/20200515143646.3857579-11-hch@lst.de Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Port on Texas Instruments TMS320C6x architecture
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*
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* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
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* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
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*/
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#ifndef _ASM_C6X_CACHEFLUSH_H
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#define _ASM_C6X_CACHEFLUSH_H
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#include <linux/spinlock.h>
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#include <asm/setup.h>
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#include <asm/cache.h>
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#include <asm/mman.h>
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#include <asm/page.h>
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#include <asm/string.h>
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/*
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* physically-indexed cache management
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*/
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#define flush_icache_range(s, e) \
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do { \
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L1D_cache_block_writeback((s), (e)); \
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L1P_cache_block_invalidate((s), (e)); \
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} while (0)
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#define flush_icache_page(vma, page) \
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do { \
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if ((vma)->vm_flags & PROT_EXEC) \
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L1D_cache_block_writeback_invalidate(page_address(page), \
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(unsigned long) page_address(page) + PAGE_SIZE)); \
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L1P_cache_block_invalidate(page_address(page), \
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(unsigned long) page_address(page) + PAGE_SIZE)); \
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} while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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memcpy(dst, src, len); \
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flush_icache_range((unsigned) (dst), (unsigned) (dst) + (len)); \
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} while (0)
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#include <asm-generic/cacheflush.h>
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#endif /* _ASM_C6X_CACHEFLUSH_H */
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