Andy Shevchenko 3fe6409c23 dmaengine: dw: fix master selection ... The commit 8950052029 ("dmaengine: dw: apply both HS interfaces and remove slave_id usage") cleaned up the code to avoid usage of depricated slave_id member of generic slave configuration. Meanwhile it broke the master selection by removing important call to dwc_set_masters() in ->device_alloc_chan_resources() which copied masters from custom slave configuration to the internal channel structure. Everything works until now since there is no customized connection of DesignWare DMA IP to the bus, i.e. one bus and one or more masters are in use. The configurations where 2 masters are connected to the different masters are not working anymore. We are expecting one user of such configuration and need to select masters properly. Besides that it is obviously a performance regression since only one master is in use in multi-master configuration. Select masters in accordance with what user asked for. Keep this patch in a form more suitable for back porting. We are safe to take necessary data in ->device_alloc_chan_resources() because we don't support generic slave configuration embedded into custom one, and thus the only way to provide such is to use the parameter to a filter function which is called exactly before channel resource allocation. While here, replase BUG_ON to less noisy dev_warn() and prevent channel allocation in case of error. Fixes: 8950052029 ("dmaengine: dw: apply both HS interfaces and remove slave_id usage") Cc: stable@vger.kernel.org Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2016-04-13 21:34:31 +05:30
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core.c	dmaengine: dw: fix master selection	2016-04-13 21:34:31 +05:30
internal.h	dmaengine: dw: export probe()/remove() and Co to users	2014-10-15 20:31:05 +05:30
Kconfig	dmaengine: sort the dw Kconfig	2015-08-24 13:58:18 +05:30
Makefile	dma: dw: add PCI part of the driver	2013-07-05 11:40:45 +05:30
pci.c	dmaengine: dw: pci: add ID for WildcatPoint PCH	2016-02-08 08:35:17 +05:30
platform.c	dmaengine updates for 4.5-rc1	2016-01-13 10:59:52 -08:00
regs.h	dmaengine: dw: fix a typo for bitfields of CTL_LO	2016-01-25 09:49:55 +05:30